mirror of
https://github.com/RIOT-OS/RIOT.git
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4e4f908379
Currently this works only in qemu.
137 lines
3.3 KiB
C
137 lines
3.3 KiB
C
/*
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* Copyright (C) 2014 René Kijewski <rene.kijewski@fu-berlin.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/**
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* @ingroup x86-irq
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* @{
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*
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* @file
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* @brief UART reading and writing.
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*
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* @author René Kijewski <rene.kijewski@fu-berlin.de>
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*
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* @}
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*/
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#include "board.h"
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#include "x86_ports.h"
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#include "x86_uart.h"
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#include <cpu.h>
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#include <board_uart0.h>
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#include <inttypes.h>
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#include <stdint.h>
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#include <stdio.h>
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void x86_early_init_uart(void)
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{
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outb(UART_PORT + IER, 0x00); /* Disable all interrupts */
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outb(UART_PORT + LCR, LCR_DLAB);
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outb(UART_PORT + DLL, BAUD_LL); /* Set divisor (lo byte) */
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outb(UART_PORT + DLH, BAUD_HL); /* (hi byte) */
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outb(UART_PORT + LCR, LCR_WORD_BITS_8 | LCR_PAR_NONE | LCR_STOP_BITS_1);
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outb(UART_PORT + FCR, FCR_ENABLE | FCR_CLR_RECV | FCR_CLR_SEND | FCR_TRIGGER_16);
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outb(UART_PORT + MCR, MCR_DSR | MCR_RTS | MCR_AUX2);
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}
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static bool is_output_empty(void)
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{
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uint8_t data = inb(UART_PORT + LSR);
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return (data & 0x20) != 0;
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}
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static bool is_input_empty(void)
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{
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uint8_t data = inb(UART_PORT + LSR);
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return (data & 0x01) == 0;
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}
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ssize_t x86_uart_write(const char *buf, size_t len)
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{
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if (!UART_PORT) {
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return -1;
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}
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(void) buf;
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size_t written = 0;
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while (written < len) {
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while (!is_output_empty()) {
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asm volatile ("pause");
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}
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outb(UART_PORT + THR, buf[written]);
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++written;
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}
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return written;
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}
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ssize_t x86_uart_read(char *buf, size_t len)
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{
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if (!UART_PORT) {
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return -1;
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}
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size_t read = 0;
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while (read < len) {
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while (!is_input_empty()) {
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asm volatile ("pause");
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}
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buf[read] = inb(UART_PORT + RBR);
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++read;
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}
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return read;
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}
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#ifdef MODULE_UART0
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static void com_handler(uint8_t irq_num)
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{
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(void) irq_num; /* == UART_IRQ */
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switch (inb(UART_PORT + IIR) & IIR_INT_MASK) {
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case IIR_INT_BR: {
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while (is_input_empty()) {
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asm volatile ("pause");
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}
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do {
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uint8_t c = inb(UART_PORT + RBR);
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uart0_handle_incoming(c);
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} while (!is_input_empty());
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uart0_notify_thread();
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break;
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}
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case IIR_INT_TH:
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case IIR_INT_LS:
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case IIR_INT_TO:
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default:
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break;
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}
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}
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#endif /* ifdef MODULE_UART0 */
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void x86_init_uart(void)
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{
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#ifdef MODULE_UART0
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x86_pic_set_handler(UART_IRQ, com_handler);
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x86_pic_enable_irq(UART_IRQ);
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outb(UART_PORT + IER, IER_RECV); /* Enable receive interrupt */
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puts("UART initialized");
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#endif
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}
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