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432 lines
13 KiB
C
432 lines
13 KiB
C
/*
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* Copyright (C) 2014 René Kijewski <rene.kijewski@fu-berlin.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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/**
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* @ingroup x86-irq
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* @{
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*
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* @file
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* @brief Interrupt entry points for x86.
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*
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* @author René Kijewski <rene.kijewski@fu-berlin.de>
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*
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* @}
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*/
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#include "x86_interrupts.h"
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#include "x86_memory.h"
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#include "x86_ports.h"
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#include "x86_registers.h"
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#include "x86_threading.h"
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#include <attributes.h>
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#include <cpu.h>
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#include <sched.h>
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#include <thread.h>
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#include <ucontext.h>
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#include <stdint.h>
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#include <stdio.h>
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#define ASM_FUN_ATTRIBUTES \
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__attribute__((noinline)) \
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__attribute__((no_instrument_function)) \
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__attribute__((optimize("Os", "omit-frame-pointer")))
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static const char *const exception_name[X86_MAX_INTERRUPTS] = {
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[0x00] = "Divide by zero",
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[0x01] = "Debug",
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[0x02] = "Non-maskable Interrupt",
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[0x03] = "Breakpoint",
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[0x04] = "Overflow",
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[0x05] = "Bound range",
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[0x06] = "Invalid Opcode",
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[0x07] = "Device not available",
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[0x08] = "Double Fault",
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[0x09] = NULL,
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[0x0a] = NULL,
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[0x0b] = NULL,
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[0x0c] = NULL,
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[0x0d] = "General Protection Fault",
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[0x0e] = "Page Fault",
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[0x0f] = NULL,
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[0x10] = "x87 Floating-Point Exception",
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[0x11] = "Alignment Check",
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[0x12] = "Machine Check",
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[0x13] = NULL,
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[0x14] = NULL,
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[0x15] = NULL,
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[0x16] = NULL,
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[0x17] = NULL,
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[0x18] = NULL,
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[0x19] = NULL,
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[0x1a] = NULL,
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[0x1b] = NULL,
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[0x1c] = NULL,
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[0x1d] = NULL,
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[0x1e] = NULL,
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[0x1f] = NULL,
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[0x20] = "PIC PIT",
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[0x21] = "PIC KBC1",
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[0x22] = NULL,
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[0x23] = "PIC RS232 2/4",
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[0x24] = "PIC RS232 1/3",
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[0x25] = "PIC LPT2",
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[0x26] = "PIC floppy",
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[0x27] = "PIC LPT1",
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[0x28] = "PIC RTC",
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[0x29] = "PIC #9",
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[0x2a] = "PIC ATA4",
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[0x2b] = "PIC ATA3",
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[0x2c] = "PIC KBC2",
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[0x2d] = NULL,
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[0x2e] = "PIC ATA1",
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[0x2f] = "PIC ATA2",
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};
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uint8_t x86_current_interrupt;
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unsigned long x86_current_interrupt_error_code;
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struct x86_pushad x86_interrupted_ctx;
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char x86_interrupt_handler_stack[2048];
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static x86_intr_handler_t x86_registered_interrupts[X86_MAX_INTERRUPTS];
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static void print_stacktrace(unsigned long bp, unsigned long ip)
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{
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puts("<stack trace>");
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printf(" %08lx\n", ip);
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for (unsigned max_depth = 0; max_depth < 30; ++max_depth) {
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uint64_t pte = x86_get_pte(bp) & x86_get_pte(bp + 4);
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if (!(pte & PT_P) || !(pte & PT_PWT)) {
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puts(" ???");
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break;
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}
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unsigned long *bp_ = (void *) bp;
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ip = bp_[1];
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if (ip == 0) {
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break;
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}
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printf(" %08lx\n", ip);
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bp = bp_[0];
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if (bp == 0) {
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break;
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}
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}
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puts("</stack trace>");
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}
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void x86_print_registers(struct x86_pushad *orig_ctx, unsigned long error_code)
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{
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unsigned long *sp = (void *) orig_ctx->sp; /* ip, cs, flags */
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printf("EAX=%08lx ECX=%08lx EDX=%08lx EBX=%08lx\n", orig_ctx->ax, orig_ctx->cx, orig_ctx->dx, orig_ctx->bx);
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printf("ESP=%08lx EBP=%08lx ESI=%08lx EDI=%08lx\n", orig_ctx->sp, orig_ctx->bp, orig_ctx->si, orig_ctx->di);
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printf("Error code=%08lx\n", error_code);
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printf("CR0=%08x CR2=%08x CR3=%08x CR4=%08x\n", cr0_read(), cr2_read(), cr3_read(), cr4_read());
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printf("EIP=%04lx:%08lx EFLAGS=%08lx\n", sp[1], sp[0], sp[2]);
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print_stacktrace(orig_ctx->bp, sp[0]);
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}
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static void intr_handler_default(uint8_t intr_num, struct x86_pushad *orig_ctx, unsigned long error_code)
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{
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printf("Unhandled interrupt 0x%02x (%s)\n", intr_num, exception_name[intr_num]);
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x86_print_registers(orig_ctx, error_code);
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puts("Halting.");
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x86_hlt();
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}
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void x86_int_exit(void) NORETURN;
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static void continue_after_intr(void)
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{
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ucontext_t *ctx = (ucontext_t *) sched_active_thread->sp;
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x86_interrupted_ctx = ctx->uc_context.registers;
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asm volatile (
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"push %0\n" /* flags */
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"push $0x0008\n" /* cs */
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"push %1\n" /* ip */
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"jmp x86_int_exit"
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:: "g"(ctx->__intr.flags), "g"(ctx->__intr.ip)
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);
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__builtin_unreachable();
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}
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static unsigned in_intr_handler = 0, old_intr;
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void x86_int_handler(void)
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{
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switch (in_intr_handler++) {
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case 0:
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break;
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case 1:
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printf("Interrupt 0x%02x (%s) while handling 0x%02x (%s)\n",
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x86_current_interrupt, exception_name[x86_current_interrupt],
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old_intr, exception_name[old_intr]);
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x86_print_registers(&x86_interrupted_ctx, x86_current_interrupt_error_code);
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puts("Halting.");
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x86_hlt();
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default:
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x86_hlt();
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}
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old_intr = x86_current_interrupt;
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bool old_in_isr = x86_in_isr;
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x86_in_isr = true;
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x86_intr_handler_t intr_handler = x86_registered_interrupts[x86_current_interrupt];
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(intr_handler ? intr_handler : intr_handler_default)(x86_current_interrupt, &x86_interrupted_ctx, x86_current_interrupt_error_code);
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--in_intr_handler;
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unsigned long *sp = (void *) x86_interrupted_ctx.sp; /* ip, cs, flags */
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if (!sched_context_switch_request || !(sp[2] & X86_IF)) {
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x86_in_isr = old_in_isr;
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return;
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}
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ucontext_t *ctx = (ucontext_t *) sched_active_thread->sp;
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ctx->uc_context.registers = x86_interrupted_ctx;
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ctx->uc_stack.ss_sp = x86_interrupt_handler_stack;
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ctx->uc_stack.ss_size = sizeof x86_interrupt_handler_stack;
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asm volatile ("pushf; pop %0" : "=g"(ctx->uc_context.flags));
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ctx->uc_context.ip = (void *) (uintptr_t) &continue_after_intr;
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ctx->__intr.ip = sp[0];
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ctx->__intr.flags = sp[2];
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thread_yield();
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__builtin_unreachable();
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}
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void ASM_FUN_ATTRIBUTES NORETURN x86_int_entry(void)
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{
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asm volatile ("mov %eax, (4*0 + x86_interrupted_ctx)");
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asm volatile ("mov %ecx, (4*1 + x86_interrupted_ctx)");
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asm volatile ("mov %edx, (4*2 + x86_interrupted_ctx)");
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asm volatile ("mov %ebx, (4*3 + x86_interrupted_ctx)");
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asm volatile ("mov %ebp, (4*5 + x86_interrupted_ctx)");
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asm volatile ("mov %esi, (4*6 + x86_interrupted_ctx)");
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asm volatile ("mov %edi, (4*7 + x86_interrupted_ctx)");
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asm volatile ("jnc 1f");
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asm volatile (" mov (%esp), %eax");
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asm volatile (" add $4, %esp");
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asm volatile (" jmp 2f");
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asm volatile ("1:");
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asm volatile (" xor %eax, %eax");
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asm volatile ("2:");
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asm volatile (" mov %eax, x86_current_interrupt_error_code");
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asm volatile ("mov %esp, (4*4 + x86_interrupted_ctx)");
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asm volatile ("mov %0, %%esp" :: "g"(&x86_interrupt_handler_stack[sizeof x86_interrupt_handler_stack]));
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asm volatile ("call x86_int_handler");
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asm volatile ("jmp x86_int_exit");
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__builtin_unreachable();
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}
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void ASM_FUN_ATTRIBUTES NORETURN x86_int_exit(void)
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{
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asm volatile ("mov (4*0 + x86_interrupted_ctx), %eax");
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asm volatile ("mov (4*1 + x86_interrupted_ctx), %ecx");
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asm volatile ("mov (4*2 + x86_interrupted_ctx), %edx");
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asm volatile ("mov (4*3 + x86_interrupted_ctx), %ebx");
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asm volatile ("mov (4*5 + x86_interrupted_ctx), %ebp");
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asm volatile ("mov (4*6 + x86_interrupted_ctx), %esi");
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asm volatile ("mov (4*7 + x86_interrupted_ctx), %edi");
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asm volatile ("mov (4*4 + x86_interrupted_ctx), %esp");
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asm volatile ("iret");
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__builtin_unreachable();
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}
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#define DECLARE_INT(NUM, HAS_ERROR_CODE, MNEMONIC) \
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static void ASM_FUN_ATTRIBUTES NORETURN x86_int_entry_##NUM##h(void) \
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{ \
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asm volatile ("movb %0, x86_current_interrupt" :: "n"(0x##NUM)); \
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if ((HAS_ERROR_CODE)) { \
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asm volatile ("stc"); \
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} \
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else { \
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asm volatile ("clc"); \
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}\
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asm volatile ("jmp x86_int_entry"); \
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__builtin_unreachable(); \
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}
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DECLARE_INT(00, 0, "#DE")
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DECLARE_INT(01, 0, "#DB")
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DECLARE_INT(02, 0, "NMI")
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DECLARE_INT(03, 0, "#BP")
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DECLARE_INT(04, 0, "#OF")
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DECLARE_INT(05, 0, "#BR")
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DECLARE_INT(06, 0, "#UD")
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DECLARE_INT(07, 0, "#NM")
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DECLARE_INT(08, 1, "#DF")
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DECLARE_INT(0d, 1, "#GP")
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DECLARE_INT(0e, 1, "#PF")
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DECLARE_INT(10, 0, "#MF")
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DECLARE_INT(11, 1, "#AC")
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DECLARE_INT(12, 0, "#MC")
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DECLARE_INT(20, 0, "PIC PIT")
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DECLARE_INT(21, 1, "PIC KBC1")
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DECLARE_INT(23, 0, "PIC RS232 2/4")
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DECLARE_INT(24, 0, "PIC RS232 1/3")
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DECLARE_INT(25, 0, "PIC LPT2")
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DECLARE_INT(26, 0, "PIC floppy")
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DECLARE_INT(27, 0, "PIC LPT1")
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DECLARE_INT(28, 0, "PIC RPC")
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DECLARE_INT(29, 0, "PIC #9")
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DECLARE_INT(2a, 0, "PIC ATA4")
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DECLARE_INT(2b, 0, "PIC ATA3")
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DECLARE_INT(2c, 0, "PIC KBC2")
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DECLARE_INT(2e, 0, "PIC ATA1")
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DECLARE_INT(2f, 0, "PIC ATA2")
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static struct idt_desc X86_IDT_ENTRIES[X86_MAX_INTERRUPTS];
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static struct idtr_t idtr = {
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.limit = sizeof X86_IDT_ENTRIES,
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.base = &X86_IDT_ENTRIES[0],
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};
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#define INTR_TEST_REG_AX (0xAA00AA00ul)
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#define INTR_TEST_REG_DX (0x00DD00DDul)
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#define INTR_TEST_REG_CX (0xC0C0C0C0ul)
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#define INTR_TEST_REG_BX (0x0B0B0B0Bul)
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#define INTR_TEST_REG_SI (0x00666600ul)
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#define INTR_TEST_REG_DI (0x33000033ul)
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static void intr_handler_test_int_bp(uint8_t intr_num, struct x86_pushad *orig_ctx, unsigned long error_code)
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{
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(void) error_code;
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if (intr_num != X86_INT_BP ||
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orig_ctx->ax != INTR_TEST_REG_AX ||
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orig_ctx->dx != INTR_TEST_REG_DX ||
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orig_ctx->cx != INTR_TEST_REG_CX ||
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orig_ctx->bx != INTR_TEST_REG_BX ||
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orig_ctx->si != INTR_TEST_REG_SI ||
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orig_ctx->di != INTR_TEST_REG_DI
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) {
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puts("Interrupt handler test failed (int 3, capture registers).");
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x86_hlt();
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}
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orig_ctx->ax ^= -1;
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orig_ctx->dx ^= -2;
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orig_ctx->cx ^= -3;
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orig_ctx->bx ^= -4;
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orig_ctx->si ^= -5;
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orig_ctx->di ^= -6;
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}
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static void test_int_bp(void)
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{
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x86_registered_interrupts[X86_INT_BP] = intr_handler_test_int_bp;
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unsigned long ax = INTR_TEST_REG_AX;
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unsigned long dx = INTR_TEST_REG_DX;
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unsigned long cx = INTR_TEST_REG_CX;
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unsigned long bx = INTR_TEST_REG_BX;
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unsigned long si;
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unsigned long di;
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unsigned long eflags_before, eflags_after;
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asm volatile (
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"mov %8, %%esi\n"
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"mov %9, %%edi\n"
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"pushf; pop %6\n"
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"int3\n"
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"pushf; pop %7\n"
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"mov %%esi, %4\n"
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"mov %%edi, %5\n"
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: "+a"(ax), "+d"(dx), "+c"(cx), "+b"(bx), "=g"(si), "=g"(di), "=g"(eflags_before), "=g"(eflags_after)
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: "n"(INTR_TEST_REG_SI), "n"(INTR_TEST_REG_DI)
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: "esi", "edi"
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);
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if (ax != (INTR_TEST_REG_AX ^ -1) ||
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dx != (INTR_TEST_REG_DX ^ -2) ||
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cx != (INTR_TEST_REG_CX ^ -3) ||
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bx != (INTR_TEST_REG_BX ^ -4) ||
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si != (INTR_TEST_REG_SI ^ -5) ||
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di != (INTR_TEST_REG_DI ^ -6) ||
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/* ignore EFLAGS.TF, hurts debugging */
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((eflags_before != eflags_after) && ((eflags_before ^ eflags_after) != X86_TF))
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) {
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puts("Interrupt handler test failed (int 3, return code).");
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x86_hlt();
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}
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x86_registered_interrupts[X86_INT_BP] = NULL;
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}
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static inline void __attribute__((always_inline)) set_idt_desc(void (*fun_)(void), unsigned num, unsigned pl)
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{
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uintptr_t fun = (uintptr_t) fun_;
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X86_IDT_ENTRIES[num] = (struct idt_desc) {
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.offset_1 = fun & 0xffff,
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.selector = 8,
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.zero = 0,
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.type_attr = 14 | (0 << 4) | (pl << 5) | (1 << 7),
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.offset_2 = fun >> 16,
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};
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}
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#define SET_IDT_DESC(NUM, HAS_ERROR_CODE, MNEMONIC, PL) \
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(set_idt_desc(x86_int_entry_##NUM##h, 0x##NUM, PL));
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static void load_interrupt_descriptor_table(void)
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{
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SET_IDT_DESC(00, 0, "#DE", 0)
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SET_IDT_DESC(01, 0, "#DB", 0)
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SET_IDT_DESC(02, 0, "NMI", 0)
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SET_IDT_DESC(03, 0, "#BP", 3)
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SET_IDT_DESC(04, 0, "#OF", 0)
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SET_IDT_DESC(05, 0, "#BR", 0)
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SET_IDT_DESC(06, 0, "#UD", 0)
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SET_IDT_DESC(07, 0, "#NM", 0)
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SET_IDT_DESC(08, 1, "#DF", 0)
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SET_IDT_DESC(0d, 1, "#GP", 0)
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SET_IDT_DESC(0e, 1, "#PF", 0)
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SET_IDT_DESC(10, 0, "#MF", 0)
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SET_IDT_DESC(11, 1, "#AC", 0)
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SET_IDT_DESC(12, 0, "#MC", 0)
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SET_IDT_DESC(20, 0, "PIC PIT", 0)
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SET_IDT_DESC(21, 1, "PIC KBC1", 0)
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SET_IDT_DESC(23, 0, "PIC RS232 2/4", 0)
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SET_IDT_DESC(24, 0, "PIC RS232 1/3", 0)
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SET_IDT_DESC(25, 0, "PIC LPT2", 0)
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SET_IDT_DESC(26, 0, "PIC floppy", 0)
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SET_IDT_DESC(27, 0, "PIC LPT1", 0)
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SET_IDT_DESC(28, 0, "PIC RPC", 0)
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SET_IDT_DESC(29, 0, "PIC #9", 0)
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SET_IDT_DESC(2a, 0, "PIC ATA4", 0)
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SET_IDT_DESC(2b, 0, "PIC ATA3", 0)
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SET_IDT_DESC(2c, 0, "PIC KBC2", 0)
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SET_IDT_DESC(2e, 0, "PIC ATA1", 0)
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SET_IDT_DESC(2f, 0, "PIC ATA2", 0)
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asm volatile ("lidt %0" :: "m"(idtr));
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}
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void x86_init_interrupts(void)
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{
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load_interrupt_descriptor_table();
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test_int_bp();
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puts("Interrupt handling initialized");
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}
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void x86_interrupt_handler_set(unsigned num, x86_intr_handler_t handler)
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{
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x86_registered_interrupts[num] = handler;
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}
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