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bfb3d52a63
The sam0 MCUs all have a DAC peripheral. The DAC has a resulution of 10 or 12 bits and can have one or two output channels. The output pins are always hard-wired to PA2 for DAC0 and PA5 for DAC1 if it exists. On the same54-xpro I would only get a max value of ~1V when using the internal reference, so I configured it to use an external voltage reference. The external reference pin is hard-wired to PA3, so you'll have to connect that to 3.3V to get results.
178 lines
3.7 KiB
C
178 lines
3.7 KiB
C
/*
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* Copyright (C) 2020 Beuth Hochschule für Technik Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_sam0_common
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* @{
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*
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* @file
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* @brief Low-level DAC driver implementation
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*
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* @author Benjamin Valentin <benpicco@beuth-hochschule.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "periph/dac.h"
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#include "periph/gpio.h"
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#define DAC_VAL(in) (in >> (16 - DAC_RES_BITS))
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static void _dac_init_clock(dac_t line)
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{
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sam0_gclk_enable(DAC_CLOCK);
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/* GCLK Setup */
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#ifdef GCLK_PCHCTRL_CHEN
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GCLK->PCHCTRL[DAC_GCLK_ID].reg = GCLK_PCHCTRL_CHEN
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| GCLK_PCHCTRL_GEN(DAC_CLOCK);
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#else
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GCLK->CLKCTRL.reg = GCLK_CLKCTRL_CLKEN
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| GCLK_CLKCTRL_GEN(DAC_CLOCK)
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| GCLK_CLKCTRL_ID(DAC_GCLK_ID);
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#endif
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dac_poweron(line);
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}
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static inline bool _ext_vref(void)
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{
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#ifdef DAC_CTRLB_REFSEL_VREFP
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return DAC_VREF == DAC_CTRLB_REFSEL_VREFP;
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#endif
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#ifdef DAC_CTRLB_REFSEL_VREFPU
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return (DAC_VREF == DAC_CTRLB_REFSEL_VREFPU) ||
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(DAC_VREF == DAC_CTRLB_REFSEL_VREFPB);
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#endif
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}
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static inline void _sync(void)
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{
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#ifdef DAC_SYNCBUSY_MASK
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while (DAC->SYNCBUSY.reg) {}
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#else
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while (DAC->STATUS.bit.SYNCBUSY) {}
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#endif
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}
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#ifdef DAC_DACCTRL_CCTRL_Msk
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static uint32_t _get_CCTRL(uint32_t freq)
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{
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if (freq < 1200000) {
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return DAC_DACCTRL_CCTRL_CC100K;
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}
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if (freq < 6000000) {
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return DAC_DACCTRL_CCTRL_CC1M;
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}
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if (freq < 12000000) {
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return DAC_DACCTRL_CCTRL_CC12M;
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}
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assert(0);
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return 0;
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}
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#endif
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int8_t dac_init(dac_t line)
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{
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switch (line) {
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case 0:
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/* DAC0 is always connected to PA2 */
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gpio_init(GPIO_PIN(PA, 2), GPIO_OUT);
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gpio_init_mux(GPIO_PIN(PA, 2), GPIO_MUX_B);
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break;
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#ifdef PIN_PA05B_DAC_VOUT1
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case 1:
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/* DAC1 is always connected to PA5 */
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gpio_init(GPIO_PIN(PA, 5), GPIO_OUT);
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gpio_init_mux(GPIO_PIN(PA, 5), GPIO_MUX_B);
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break;
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#endif
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default:
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return DAC_NOLINE;
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}
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if (_ext_vref()) {
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/* PA3 is external reference voltage */
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gpio_init_mux(GPIO_PIN(PA, 3), GPIO_MUX_B);
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}
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_dac_init_clock(line);
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/* Settings can only be changed when DAC is disabled */
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DAC->CTRLA.bit.ENABLE = 0;
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_sync();
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#ifdef DAC_DACCTRL_ENABLE
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DAC->DACCTRL[line].reg = DAC_DACCTRL_ENABLE
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| _get_CCTRL(sam0_gclk_freq(DAC_CLOCK));
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#endif
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/* Set Reference Voltage & enable Output if needed */
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DAC->CTRLB.reg = DAC_VREF
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#ifdef DAC_CTRLB_EOEN
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| DAC_CTRLB_EOEN
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#endif
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;
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DAC->CTRLA.bit.ENABLE = 1;
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_sync();
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return DAC_OK;
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}
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void dac_set(dac_t line, uint16_t value)
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{
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#ifdef DAC_SYNCBUSY_DATA1
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/* DAC has multiple outputs */
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const uint32_t mask = (1 << (DAC_SYNCBUSY_DATA_Pos + line));
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while (DAC->SYNCBUSY.reg & mask) {}
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DAC->DATA[line].reg = DAC_VAL(value);
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#else
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/* DAC has only one output */
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(void) line;
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_sync();
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DAC->DATA.reg = DAC_VAL(value);
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#endif
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}
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void dac_poweron(dac_t line)
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{
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(void) line;
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#ifdef PM_APBCMASK_DAC
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PM->APBCMASK.reg |= PM_APBCMASK_DAC;
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#endif
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#ifdef MCLK_APBCMASK_DAC
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MCLK->APBCMASK.reg |= MCLK_APBCMASK_DAC;
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#endif
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#ifdef MCLK_APBDMASK_DAC
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MCLK->APBDMASK.reg |= MCLK_APBDMASK_DAC;
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#endif
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}
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void dac_poweroff(dac_t line)
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{
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(void) line;
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#ifdef PM_APBCMASK_DAC
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PM->APBCMASK.reg &= ~PM_APBCMASK_DAC;
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#endif
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#ifdef MCLK_APBCMASK_DAC
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MCLK->APBCMASK.reg &= ~MCLK_APBCMASK_DAC;
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#endif
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#ifdef MCLK_APBDMASK_DAC
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MCLK->APBDMASK.reg &= ~MCLK_APBDMASK_DAC;
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#endif
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}
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