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120 lines
3.1 KiB
C
120 lines
3.1 KiB
C
/*
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* Copyright (C) 2015-2017 Freie Universität Berlin
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* 2017 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32l0
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Generate GPIO mode bitfields
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*
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* We use 5 bit to encode the mode:
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* - bit 0+1: pin mode (input / output)
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* - bit 2+3: pull resistor configuration
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* - bit 4: output type (0: push-pull, 1: open-drain)
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*/
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#define GPIO_MODE(io, pr, ot) ((io << 0) | (pr << 2) | (ot << 4))
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#ifndef DOXYGEN
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/**
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* @brief Override GPIO mode options
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* @{
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*/
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#define HAVE_GPIO_MODE_T
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typedef enum {
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GPIO_IN = GPIO_MODE(0, 0, 0), /**< input w/o pull R */
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GPIO_IN_PD = GPIO_MODE(0, 2, 0), /**< input with pull-down */
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GPIO_IN_PU = GPIO_MODE(0, 1, 0), /**< input with pull-up */
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GPIO_OUT = GPIO_MODE(1, 0, 0), /**< push-pull output */
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GPIO_OD = GPIO_MODE(1, 0, 1), /**< open-drain w/o pull R */
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GPIO_OD_PU = GPIO_MODE(1, 1, 1) /**< open-drain with pull-up */
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} gpio_mode_t;
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/** @} */
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/**
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* @brief Override flank configuration values
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* @{
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*/
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#define HAVE_GPIO_FLANK_T
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typedef enum {
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GPIO_RISING = 1, /**< emit interrupt on rising flank */
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GPIO_FALLING = 2, /**< emit interrupt on falling flank */
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GPIO_BOTH = 3 /**< emit interrupt on both flanks */
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} gpio_flank_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief Available ports on the STM32F0 family
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*/
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enum {
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PORT_A = 0, /**< port A */
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PORT_B = 1, /**< port B */
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PORT_C = 2, /**< port C */
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PORT_D = 3, /**< port D */
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PORT_F = 5, /**< port F */
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};
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#ifndef DOXYGEN
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/**
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* @brief Override ADC resolution values
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = (0x3 << 3), /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = (0x2 << 3), /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = (0x1 << 3), /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = (0x0 << 3), /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = (0xfe), /**< not applicable */
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ADC_RES_16BIT = (0xff) /**< not applicable */
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief ADC line configuration values
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*/
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typedef struct {
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gpio_t pin; /**< pin to use */
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uint8_t chan; /**< internal channel the pin is connected to */
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} adc_conf_t;
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/**
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* @brief DAC line configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the line */
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uint8_t chan; /**< DAC device used for this line */
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} dac_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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