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7d1d5e77d8
New CPU FE310 from SiFive based on RISC-V architecture build: add makefile for RISC-V builds Makefile for builds using RISC-V tools
35 lines
672 B
C
35 lines
672 B
C
// See LICENSE file for licence details
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#ifndef PLIC_DRIVER_H
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#define PLIC_DRIVER_H
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typedef uint32_t plic_source;
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typedef uint32_t plic_priority;
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typedef uint32_t plic_threshold;
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void PLIC_init (
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uintptr_t base_addr,
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uint32_t num_sources,
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uint32_t num_priorities
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);
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void PLIC_set_threshold (plic_threshold threshold);
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void PLIC_enable_interrupt (plic_source source);
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void PLIC_disable_interrupt (plic_source source);
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void PLIC_set_priority (
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plic_source source,
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plic_priority priority);
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plic_source PLIC_claim_interrupt(void);
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void PLIC_complete_interrupt(plic_source source);
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#endif
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