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RIOT/cpu/riscv_common/ldscripts
Sören Tempel e41063d40e cpu/riscv_common: fix undeclared memory region linker error
Since commit 3a11b1fbd2 (#16972)
building RIOT applications with `BOARD=hifive1` causes the following
linker error to be emitted on my system:

	/opt/rv32imc/lib/gcc/riscv32-unknown-elf/10.2.0/../../../../riscv32-unknown-elf/bin/ld:riscv_base.ld:220: warning: memory region `rom' not declared

This is due to the fact that the RISC-V linker script doesn't have a rom
memory region. While many other ARM-based boards have a rom memory
region defined in the linker script, the corresponding region name in
the RISC-V linker script is flash and rom is not declared as a memory
region hence the warning.

I think this was accidentally overlooked in
3a11b1fbd2. It is fixed in this commit by
replacing the rom region with the flash region. The linker script
identifiers (e.g. _srom and _erom) are not renamed.
2022-01-27 15:02:50 +01:00
..
riscv_base.ld cpu/riscv_common: fix undeclared memory region linker error 2022-01-27 15:02:50 +01:00
riscv_vars.ld riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00
riscv.ld riscv_common: Refactor common fe310 code to riscv_common 2021-02-05 09:32:19 +01:00