mirror of
https://github.com/RIOT-OS/RIOT.git
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144 lines
8.6 KiB
C
144 lines
8.6 KiB
C
/**************************************************************************//**
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* @file efr32mg1p_prs_signals.h
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* @brief EFR32MG1P_PRS_SIGNALS register and bit field definitions
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* @version 5.3.3
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******************************************************************************
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* # License
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* <b>Copyright 2017 Silicon Laboratories, Inc. http://www.silabs.com</b>
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******************************************************************************
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*
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* Permission is granted to anyone to use this software for any purpose,
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* including commercial applications, and to alter it and redistribute it
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* freely, subject to the following restrictions:
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*
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* 1. The origin of this software must not be misrepresented; you must not
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* claim that you wrote the original software.@n
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* 2. Altered source versions must be plainly marked as such, and must not be
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* misrepresented as being the original software.@n
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* 3. This notice may not be removed or altered from any source distribution.
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*
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* DISCLAIMER OF WARRANTY/LIMITATION OF REMEDIES: Silicon Laboratories, Inc.
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* has no obligation to support this Software. Silicon Laboratories, Inc. is
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* providing the Software "AS IS", with no express or implied warranties of any
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* kind, including, but not limited to, any implied warranties of
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* merchantability or fitness for any particular purpose or warranties against
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* infringement of any proprietary rights of a third party.
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*
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* Silicon Laboratories, Inc. will not be liable for any consequential,
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* incidental, or special damages, or any other relief, or for any claim by
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* any third party, arising from your use of this Software.
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*
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*****************************************************************************/
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#ifdef __cplusplus
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extern "C" {
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#endif
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#if defined(__ICCARM__)
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#pragma system_include /* Treat file as system include file. */
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#elif defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)
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#pragma clang system_header /* Treat file as system include file. */
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#endif
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/**************************************************************************//**
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* @addtogroup Parts
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* @{
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******************************************************************************/
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/**************************************************************************//**
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* @addtogroup EFR32MG1P_PRS
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* @{
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* @addtogroup EFR32MG1P_PRS_Signals PRS Signals
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* @{
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* @brief PRS Signal names
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*****************************************************************************/
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#define PRS_PRS_CH0 ((1 << 8) + 0) /**< PRS PRS channel 0 */
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#define PRS_PRS_CH1 ((1 << 8) + 1) /**< PRS PRS channel 1 */
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#define PRS_PRS_CH2 ((1 << 8) + 2) /**< PRS PRS channel 2 */
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#define PRS_PRS_CH3 ((1 << 8) + 3) /**< PRS PRS channel 3 */
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#define PRS_PRS_CH4 ((1 << 8) + 4) /**< PRS PRS channel 4 */
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#define PRS_PRS_CH5 ((1 << 8) + 5) /**< PRS PRS channel 5 */
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#define PRS_PRS_CH6 ((1 << 8) + 6) /**< PRS PRS channel 6 */
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#define PRS_PRS_CH7 ((1 << 8) + 7) /**< PRS PRS channel 7 */
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#define PRS_PRS_CH8 ((2 << 8) + 0) /**< PRS PRS channel 8 */
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#define PRS_PRS_CH9 ((2 << 8) + 1) /**< PRS PRS channel 9 */
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#define PRS_PRS_CH10 ((2 << 8) + 2) /**< PRS PRS channel 10 */
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#define PRS_PRS_CH11 ((2 << 8) + 3) /**< PRS PRS channel 11 */
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#define PRS_ACMP0_OUT ((6 << 8) + 0) /**< PRS Analog comparator output */
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#define PRS_ACMP1_OUT ((7 << 8) + 0) /**< PRS Analog comparator output */
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#define PRS_ADC0_SINGLE ((8 << 8) + 0) /**< PRS ADC single conversion done */
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#define PRS_ADC0_SCAN ((8 << 8) + 1) /**< PRS ADC scan conversion done */
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#define PRS_USART0_IRTX ((16 << 8) + 0) /**< PRS USART 0 IRDA out */
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#define PRS_USART0_TXC ((16 << 8) + 1) /**< PRS USART 0 TX complete */
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#define PRS_USART0_RXDATAV ((16 << 8) + 2) /**< PRS USART 0 RX Data Valid */
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#define PRS_USART0_RTS ((16 << 8) + 3) /**< PRS USART 0 RTS */
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#define PRS_USART0_TX ((16 << 8) + 5) /**< PRS USART 0 TX */
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#define PRS_USART0_CS ((16 << 8) + 6) /**< PRS USART 0 CS */
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#define PRS_USART1_TXC ((17 << 8) + 1) /**< PRS USART 1 TX complete */
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#define PRS_USART1_RXDATAV ((17 << 8) + 2) /**< PRS USART 1 RX Data Valid */
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#define PRS_USART1_RTS ((17 << 8) + 3) /**< PRS USART 0 RTS */
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#define PRS_USART1_TX ((17 << 8) + 5) /**< PRS USART 1 TX */
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#define PRS_USART1_CS ((17 << 8) + 6) /**< PRS USART 1 CS */
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#define PRS_TIMER0_UF ((28 << 8) + 0) /**< PRS Timer 0 Underflow */
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#define PRS_TIMER0_OF ((28 << 8) + 1) /**< PRS Timer 0 Overflow */
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#define PRS_TIMER0_CC0 ((28 << 8) + 2) /**< PRS Timer 0 Compare/Capture 0 */
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#define PRS_TIMER0_CC1 ((28 << 8) + 3) /**< PRS Timer 0 Compare/Capture 1 */
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#define PRS_TIMER0_CC2 ((28 << 8) + 4) /**< PRS Timer 0 Compare/Capture 2 */
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#define PRS_TIMER1_UF ((29 << 8) + 0) /**< PRS Timer 1 Underflow */
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#define PRS_TIMER1_OF ((29 << 8) + 1) /**< PRS Timer 1 Overflow */
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#define PRS_TIMER1_CC0 ((29 << 8) + 2) /**< PRS Timer 1 Compare/Capture 0 */
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#define PRS_TIMER1_CC1 ((29 << 8) + 3) /**< PRS Timer 1 Compare/Capture 1 */
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#define PRS_TIMER1_CC2 ((29 << 8) + 4) /**< PRS Timer 1 Compare/Capture 2 */
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#define PRS_TIMER1_CC3 ((29 << 8) + 5) /**< PRS Timer 1 Compare/Capture 3 */
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#define PRS_RAC_ACTIVE ((32 << 8) + 0) /**< PRS RAC is active */
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#define PRS_RAC_TX ((32 << 8) + 1) /**< PRS RAC is in TX */
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#define PRS_RAC_RX ((32 << 8) + 2) /**< PRS RAC is in RX */
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#define PRS_RAC_LNAEN ((32 << 8) + 3) /**< PRS LNA enable */
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#define PRS_RAC_PAEN ((32 << 8) + 4) /**< PRS PA enable */
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#define PRS_PROTIMER_LBTS ((35 << 8) + 5) /**< PRS Listen Before Talk Success */
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#define PRS_PROTIMER_LBTR ((35 << 8) + 6) /**< PRS Listen Before Talk Retry */
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#define PRS_PROTIMER_LBTF ((35 << 8) + 7) /**< PRS Listen Before Talk Failure */
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#define PRS_MODEM_FRAMEDET ((38 << 8) + 0) /**< PRS Frame detected */
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#define PRS_MODEM_PREDET ((38 << 8) + 1) /**< PRS Receive preamble detected */
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#define PRS_MODEM_TIMDET ((38 << 8) + 2) /**< PRS Receive timing detected */
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#define PRS_MODEM_FRAMESENT ((38 << 8) + 3) /**< PRS Entire frame transmitted */
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#define PRS_MODEM_SYNCSENT ((38 << 8) + 4) /**< PRS Syncword transmitted */
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#define PRS_MODEM_PRESENT ((38 << 8) + 5) /**< PRS Preamble transmitted */
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#define PRS_RTCC_CCV0 ((41 << 8) + 1) /**< PRS RTCC Compare 0 */
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#define PRS_RTCC_CCV1 ((41 << 8) + 2) /**< PRS RTCC Compare 1 */
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#define PRS_RTCC_CCV2 ((41 << 8) + 3) /**< PRS RTCC Compare 2 */
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#define PRS_GPIO_PIN0 ((48 << 8) + 0) /**< PRS GPIO pin 0 */
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#define PRS_GPIO_PIN1 ((48 << 8) + 1) /**< PRS GPIO pin 1 */
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#define PRS_GPIO_PIN2 ((48 << 8) + 2) /**< PRS GPIO pin 2 */
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#define PRS_GPIO_PIN3 ((48 << 8) + 3) /**< PRS GPIO pin 3 */
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#define PRS_GPIO_PIN4 ((48 << 8) + 4) /**< PRS GPIO pin 4 */
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#define PRS_GPIO_PIN5 ((48 << 8) + 5) /**< PRS GPIO pin 5 */
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#define PRS_GPIO_PIN6 ((48 << 8) + 6) /**< PRS GPIO pin 6 */
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#define PRS_GPIO_PIN7 ((48 << 8) + 7) /**< PRS GPIO pin 7 */
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#define PRS_GPIO_PIN8 ((49 << 8) + 0) /**< PRS GPIO pin 8 */
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#define PRS_GPIO_PIN9 ((49 << 8) + 1) /**< PRS GPIO pin 9 */
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#define PRS_GPIO_PIN10 ((49 << 8) + 2) /**< PRS GPIO pin 10 */
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#define PRS_GPIO_PIN11 ((49 << 8) + 3) /**< PRS GPIO pin 11 */
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#define PRS_GPIO_PIN12 ((49 << 8) + 4) /**< PRS GPIO pin 12 */
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#define PRS_GPIO_PIN13 ((49 << 8) + 5) /**< PRS GPIO pin 13 */
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#define PRS_GPIO_PIN14 ((49 << 8) + 6) /**< PRS GPIO pin 14 */
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#define PRS_GPIO_PIN15 ((49 << 8) + 7) /**< PRS GPIO pin 15 */
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#define PRS_LETIMER0_CH0 ((52 << 8) + 0) /**< PRS LETIMER CH0 Out */
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#define PRS_LETIMER0_CH1 ((52 << 8) + 1) /**< PRS LETIMER CH1 Out */
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#define PRS_PCNT0_TCC ((54 << 8) + 0) /**< PRS Triggered compare match */
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#define PRS_PCNT0_UFOF ((54 << 8) + 1) /**< PRS Counter overflow or underflow */
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#define PRS_PCNT0_DIR ((54 << 8) + 2) /**< PRS Counter direction */
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#define PRS_RFSENSE_WU ((59 << 8) + 0) /**< PRS RFSENSE Output */
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#define PRS_CRYOTIMER_PERIOD ((60 << 8) + 0) /**< PRS CRYOTIMER Output */
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#define PRS_CMU_CLKOUT0 ((61 << 8) + 0) /**< PRS Clock Output 0 */
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#define PRS_CMU_CLKOUT1 ((61 << 8) + 1) /**< PRS Clock Output 1 */
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#define PRS_CM4_TXEV ((67 << 8) + 0) /**< PRS */
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/** @} */
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/** @} End of group EFR32MG1P_PRS */
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/** @} End of group Parts */
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#ifdef __cplusplus
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}
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#endif
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