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e30aed3bc6
Specific support for the pic32mx470f512h device is added along with code common to all pic32mx devices.
71 lines
1.5 KiB
C
71 lines
1.5 KiB
C
/*
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* Copyright(C) 2016,2017, Imagination Technologies Limited and/or its
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* affiliated group companies.
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*
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*/
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/**
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* @defgroup cpu_mips_pic32mx MIPS PIC32MX
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* @ingroup cpu
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* @{
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*
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* @file
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* @brief CPU definitions for pic32mx devices.
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*
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* @author Neil Jones <neil.jones@imgtec.com>
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*/
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#ifndef _CPU_CONF_H_
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#define _CPU_CONF_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Configuration of default stack sizes
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*
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* printf takes a pretty tortured route through the C lib
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* then via UHI syscall exception to end up at the UART
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* driver.
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*
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* When debugging timer code we get printfs on the idle threads
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* stack which can easily blow its limits.
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*
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* Note code must be compiled at -Os with these values, using -O0
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* you'll overflow these stacks.
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*
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* NO ISR stack is in use yet, interrupt use the current running stack
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* hence the big-ish default stack size.
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* @{
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*/
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#ifndef THREAD_EXTRA_STACKSIZE_PRINTF
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#define THREAD_EXTRA_STACKSIZE_PRINTF (1024)
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#endif
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#ifndef THREAD_STACKSIZE_DEFAULT
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#define THREAD_STACKSIZE_DEFAULT (2048)
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#endif
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#ifndef THREAD_STACKSIZE_IDLE
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#ifdef NDEBUG
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#define THREAD_STACKSIZE_IDLE (512)
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#else
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#define THREAD_STACKSIZE_IDLE (512 + THREAD_EXTRA_STACKSIZE_PRINTF)
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#endif
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#endif
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#define ISR_STACKSIZE (0)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif
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/** @} */
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