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41 lines
846 B
C
41 lines
846 B
C
/*
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* Copyright (C) 2022 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp32_esp_ble_nimble
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* @{
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*
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* @file
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* @brief NimBLE configuration for ESP32x SoCs
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef ESP_BLE_NIMBLE_SYSCFG_SYSCFG_H
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#define ESP_BLE_NIMBLE_SYSCFG_SYSCFG_H
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#if !DOXYGEN
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/* disable native transport mechanism and enable the custom transport mechanism */
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#define MYNEWT_VAL_BLE_TRANSPORT_LL__custom (1)
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#define MYNEWT_VAL_BLE_TRANSPORT_LL__native (0)
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#include_next "syscfg/syscfg.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* !DOXYGEN */
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#endif /* ESP_BLE_NIMBLE_SYSCFG_SYSCFG_H */
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/** @} */
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