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382 lines
17 KiB
C
382 lines
17 KiB
C
/******************************************************************************
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* Filename: hw_aux_sce_h
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* Revised: 2017-01-31 09:37:48 +0100 (Tue, 31 Jan 2017)
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* Revision: 48345
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __HW_AUX_SCE_H__
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#define __HW_AUX_SCE_H__
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//*****************************************************************************
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//
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// This section defines the register offsets of
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// AUX_SCE component
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//
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//*****************************************************************************
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// Internal
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#define AUX_SCE_O_CTL 0x00000000
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// Internal
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#define AUX_SCE_O_FETCHSTAT 0x00000004
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// Internal
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#define AUX_SCE_O_CPUSTAT 0x00000008
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// Internal
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#define AUX_SCE_O_WUSTAT 0x0000000C
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// Internal
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#define AUX_SCE_O_REG1_0 0x00000010
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// Internal
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#define AUX_SCE_O_REG3_2 0x00000014
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// Internal
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#define AUX_SCE_O_REG5_4 0x00000018
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// Internal
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#define AUX_SCE_O_REG7_6 0x0000001C
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// Internal
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#define AUX_SCE_O_LOOPADDR 0x00000020
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// Internal
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#define AUX_SCE_O_LOOPCNT 0x00000024
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_CTL
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//
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//*****************************************************************************
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// Field: [31:24] FORCE_EV_LOW
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_FORCE_EV_LOW_W 8
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#define AUX_SCE_CTL_FORCE_EV_LOW_M 0xFF000000
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#define AUX_SCE_CTL_FORCE_EV_LOW_S 24
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// Field: [23:16] FORCE_EV_HIGH
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_FORCE_EV_HIGH_W 8
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#define AUX_SCE_CTL_FORCE_EV_HIGH_M 0x00FF0000
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#define AUX_SCE_CTL_FORCE_EV_HIGH_S 16
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// Field: [11:8] RESET_VECTOR
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_RESET_VECTOR_W 4
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#define AUX_SCE_CTL_RESET_VECTOR_M 0x00000F00
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#define AUX_SCE_CTL_RESET_VECTOR_S 8
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// Field: [6] DBG_FREEZE_EN
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_DBG_FREEZE_EN 0x00000040
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#define AUX_SCE_CTL_DBG_FREEZE_EN_BITN 6
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#define AUX_SCE_CTL_DBG_FREEZE_EN_M 0x00000040
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#define AUX_SCE_CTL_DBG_FREEZE_EN_S 6
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// Field: [5] FORCE_WU_LOW
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_FORCE_WU_LOW 0x00000020
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#define AUX_SCE_CTL_FORCE_WU_LOW_BITN 5
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#define AUX_SCE_CTL_FORCE_WU_LOW_M 0x00000020
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#define AUX_SCE_CTL_FORCE_WU_LOW_S 5
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// Field: [4] FORCE_WU_HIGH
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_FORCE_WU_HIGH 0x00000010
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#define AUX_SCE_CTL_FORCE_WU_HIGH_BITN 4
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#define AUX_SCE_CTL_FORCE_WU_HIGH_M 0x00000010
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#define AUX_SCE_CTL_FORCE_WU_HIGH_S 4
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// Field: [3] RESTART
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_RESTART 0x00000008
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#define AUX_SCE_CTL_RESTART_BITN 3
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#define AUX_SCE_CTL_RESTART_M 0x00000008
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#define AUX_SCE_CTL_RESTART_S 3
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// Field: [2] SINGLE_STEP
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_SINGLE_STEP 0x00000004
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#define AUX_SCE_CTL_SINGLE_STEP_BITN 2
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#define AUX_SCE_CTL_SINGLE_STEP_M 0x00000004
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#define AUX_SCE_CTL_SINGLE_STEP_S 2
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// Field: [1] SUSPEND
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_SUSPEND 0x00000002
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#define AUX_SCE_CTL_SUSPEND_BITN 1
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#define AUX_SCE_CTL_SUSPEND_M 0x00000002
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#define AUX_SCE_CTL_SUSPEND_S 1
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// Field: [0] CLK_EN
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CTL_CLK_EN 0x00000001
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#define AUX_SCE_CTL_CLK_EN_BITN 0
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#define AUX_SCE_CTL_CLK_EN_M 0x00000001
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#define AUX_SCE_CTL_CLK_EN_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_FETCHSTAT
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//
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//*****************************************************************************
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// Field: [31:16] OPCODE
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_FETCHSTAT_OPCODE_W 16
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#define AUX_SCE_FETCHSTAT_OPCODE_M 0xFFFF0000
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#define AUX_SCE_FETCHSTAT_OPCODE_S 16
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// Field: [15:0] PC
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_FETCHSTAT_PC_W 16
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#define AUX_SCE_FETCHSTAT_PC_M 0x0000FFFF
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#define AUX_SCE_FETCHSTAT_PC_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_CPUSTAT
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//
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//*****************************************************************************
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// Field: [11] BUS_ERROR
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_BUS_ERROR 0x00000800
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#define AUX_SCE_CPUSTAT_BUS_ERROR_BITN 11
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#define AUX_SCE_CPUSTAT_BUS_ERROR_M 0x00000800
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#define AUX_SCE_CPUSTAT_BUS_ERROR_S 11
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// Field: [10] SLEEP
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_SLEEP 0x00000400
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#define AUX_SCE_CPUSTAT_SLEEP_BITN 10
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#define AUX_SCE_CPUSTAT_SLEEP_M 0x00000400
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#define AUX_SCE_CPUSTAT_SLEEP_S 10
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// Field: [9] WEV
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_WEV 0x00000200
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#define AUX_SCE_CPUSTAT_WEV_BITN 9
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#define AUX_SCE_CPUSTAT_WEV_M 0x00000200
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#define AUX_SCE_CPUSTAT_WEV_S 9
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// Field: [8] SELF_STOP
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_SELF_STOP 0x00000100
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#define AUX_SCE_CPUSTAT_SELF_STOP_BITN 8
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#define AUX_SCE_CPUSTAT_SELF_STOP_M 0x00000100
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#define AUX_SCE_CPUSTAT_SELF_STOP_S 8
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// Field: [3] V_FLAG
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_V_FLAG 0x00000008
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#define AUX_SCE_CPUSTAT_V_FLAG_BITN 3
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#define AUX_SCE_CPUSTAT_V_FLAG_M 0x00000008
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#define AUX_SCE_CPUSTAT_V_FLAG_S 3
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// Field: [2] C_FLAG
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_C_FLAG 0x00000004
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#define AUX_SCE_CPUSTAT_C_FLAG_BITN 2
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#define AUX_SCE_CPUSTAT_C_FLAG_M 0x00000004
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#define AUX_SCE_CPUSTAT_C_FLAG_S 2
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// Field: [1] N_FLAG
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_N_FLAG 0x00000002
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#define AUX_SCE_CPUSTAT_N_FLAG_BITN 1
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#define AUX_SCE_CPUSTAT_N_FLAG_M 0x00000002
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#define AUX_SCE_CPUSTAT_N_FLAG_S 1
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// Field: [0] Z_FLAG
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_CPUSTAT_Z_FLAG 0x00000001
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#define AUX_SCE_CPUSTAT_Z_FLAG_BITN 0
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#define AUX_SCE_CPUSTAT_Z_FLAG_M 0x00000001
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#define AUX_SCE_CPUSTAT_Z_FLAG_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_WUSTAT
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//
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//*****************************************************************************
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// Field: [17:16] EXC_VECTOR
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_WUSTAT_EXC_VECTOR_W 2
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#define AUX_SCE_WUSTAT_EXC_VECTOR_M 0x00030000
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#define AUX_SCE_WUSTAT_EXC_VECTOR_S 16
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// Field: [8] WU_SIGNAL
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_WUSTAT_WU_SIGNAL 0x00000100
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#define AUX_SCE_WUSTAT_WU_SIGNAL_BITN 8
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#define AUX_SCE_WUSTAT_WU_SIGNAL_M 0x00000100
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#define AUX_SCE_WUSTAT_WU_SIGNAL_S 8
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// Field: [7:0] EV_SIGNALS
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_WUSTAT_EV_SIGNALS_W 8
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#define AUX_SCE_WUSTAT_EV_SIGNALS_M 0x000000FF
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#define AUX_SCE_WUSTAT_EV_SIGNALS_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_REG1_0
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//
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//*****************************************************************************
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// Field: [31:16] REG1
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG1_0_REG1_W 16
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#define AUX_SCE_REG1_0_REG1_M 0xFFFF0000
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#define AUX_SCE_REG1_0_REG1_S 16
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// Field: [15:0] REG0
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG1_0_REG0_W 16
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#define AUX_SCE_REG1_0_REG0_M 0x0000FFFF
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#define AUX_SCE_REG1_0_REG0_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_REG3_2
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//
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//*****************************************************************************
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// Field: [31:16] REG3
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG3_2_REG3_W 16
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#define AUX_SCE_REG3_2_REG3_M 0xFFFF0000
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#define AUX_SCE_REG3_2_REG3_S 16
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// Field: [15:0] REG2
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG3_2_REG2_W 16
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#define AUX_SCE_REG3_2_REG2_M 0x0000FFFF
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#define AUX_SCE_REG3_2_REG2_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_REG5_4
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//
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//*****************************************************************************
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// Field: [31:16] REG5
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG5_4_REG5_W 16
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#define AUX_SCE_REG5_4_REG5_M 0xFFFF0000
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#define AUX_SCE_REG5_4_REG5_S 16
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// Field: [15:0] REG4
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG5_4_REG4_W 16
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#define AUX_SCE_REG5_4_REG4_M 0x0000FFFF
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#define AUX_SCE_REG5_4_REG4_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_REG7_6
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//
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//*****************************************************************************
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// Field: [31:16] REG7
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG7_6_REG7_W 16
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#define AUX_SCE_REG7_6_REG7_M 0xFFFF0000
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#define AUX_SCE_REG7_6_REG7_S 16
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// Field: [15:0] REG6
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_REG7_6_REG6_W 16
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#define AUX_SCE_REG7_6_REG6_M 0x0000FFFF
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#define AUX_SCE_REG7_6_REG6_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_LOOPADDR
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//
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//*****************************************************************************
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// Field: [31:16] STOP
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_LOOPADDR_STOP_W 16
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#define AUX_SCE_LOOPADDR_STOP_M 0xFFFF0000
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#define AUX_SCE_LOOPADDR_STOP_S 16
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// Field: [15:0] START
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_LOOPADDR_START_W 16
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#define AUX_SCE_LOOPADDR_START_M 0x0000FFFF
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#define AUX_SCE_LOOPADDR_START_S 0
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//*****************************************************************************
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//
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// Register: AUX_SCE_O_LOOPCNT
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//
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//*****************************************************************************
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// Field: [7:0] ITER_LEFT
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//
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// Internal. Only to be used through TI provided API.
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#define AUX_SCE_LOOPCNT_ITER_LEFT_W 8
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#define AUX_SCE_LOOPCNT_ITER_LEFT_M 0x000000FF
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#define AUX_SCE_LOOPCNT_ITER_LEFT_S 0
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#endif // __AUX_SCE__
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