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187 lines
11 KiB
C
187 lines
11 KiB
C
/**
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* \file
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*
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* \brief Component description for OPAMP
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef _SAML21_OPAMP_COMPONENT_
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#define _SAML21_OPAMP_COMPONENT_
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/* ========================================================================== */
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/** SOFTWARE API DEFINITION FOR OPAMP */
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/* ========================================================================== */
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/** \addtogroup SAML21_OPAMP Operational Amplifier */
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/*@{*/
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#define OPAMP_U2237
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#define REV_OPAMP 0x100
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/* -------- OPAMP_CTRLA : (OPAMP Offset: 0x00) (R/W 8) Control A -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint8_t SWRST:1; /*!< bit: 0 Software Reset */
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uint8_t ENABLE:1; /*!< bit: 1 Enable */
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uint8_t :5; /*!< bit: 2.. 6 Reserved */
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uint8_t LPMUX:1; /*!< bit: 7 Low-Power Mux */
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} bit; /*!< Structure used for bit access */
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uint8_t reg; /*!< Type used for register access */
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} OPAMP_CTRLA_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define OPAMP_CTRLA_OFFSET 0x00 /**< \brief (OPAMP_CTRLA offset) Control A */
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#define OPAMP_CTRLA_RESETVALUE 0x00ul /**< \brief (OPAMP_CTRLA reset_value) Control A */
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#define OPAMP_CTRLA_SWRST_Pos 0 /**< \brief (OPAMP_CTRLA) Software Reset */
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#define OPAMP_CTRLA_SWRST (0x1ul << OPAMP_CTRLA_SWRST_Pos)
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#define OPAMP_CTRLA_ENABLE_Pos 1 /**< \brief (OPAMP_CTRLA) Enable */
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#define OPAMP_CTRLA_ENABLE (0x1ul << OPAMP_CTRLA_ENABLE_Pos)
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#define OPAMP_CTRLA_LPMUX_Pos 7 /**< \brief (OPAMP_CTRLA) Low-Power Mux */
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#define OPAMP_CTRLA_LPMUX (0x1ul << OPAMP_CTRLA_LPMUX_Pos)
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#define OPAMP_CTRLA_MASK 0x83ul /**< \brief (OPAMP_CTRLA) MASK Register */
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/* -------- OPAMP_STATUS : (OPAMP Offset: 0x02) (R/ 8) Status -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint8_t READY0:1; /*!< bit: 0 OPAMP 0 Ready */
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uint8_t READY1:1; /*!< bit: 1 OPAMP 1 Ready */
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uint8_t READY2:1; /*!< bit: 2 OPAMP 2 Ready */
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uint8_t :5; /*!< bit: 3.. 7 Reserved */
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} bit; /*!< Structure used for bit access */
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struct {
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uint8_t READY:3; /*!< bit: 0.. 2 OPAMP x Ready */
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uint8_t :5; /*!< bit: 3.. 7 Reserved */
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} vec; /*!< Structure used for vec access */
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uint8_t reg; /*!< Type used for register access */
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} OPAMP_STATUS_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define OPAMP_STATUS_OFFSET 0x02 /**< \brief (OPAMP_STATUS offset) Status */
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#define OPAMP_STATUS_RESETVALUE 0x00ul /**< \brief (OPAMP_STATUS reset_value) Status */
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#define OPAMP_STATUS_READY0_Pos 0 /**< \brief (OPAMP_STATUS) OPAMP 0 Ready */
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#define OPAMP_STATUS_READY0 (1 << OPAMP_STATUS_READY0_Pos)
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#define OPAMP_STATUS_READY1_Pos 1 /**< \brief (OPAMP_STATUS) OPAMP 1 Ready */
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#define OPAMP_STATUS_READY1 (1 << OPAMP_STATUS_READY1_Pos)
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#define OPAMP_STATUS_READY2_Pos 2 /**< \brief (OPAMP_STATUS) OPAMP 2 Ready */
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#define OPAMP_STATUS_READY2 (1 << OPAMP_STATUS_READY2_Pos)
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#define OPAMP_STATUS_READY_Pos 0 /**< \brief (OPAMP_STATUS) OPAMP x Ready */
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#define OPAMP_STATUS_READY_Msk (0x7ul << OPAMP_STATUS_READY_Pos)
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#define OPAMP_STATUS_READY(value) ((OPAMP_STATUS_READY_Msk & ((value) << OPAMP_STATUS_READY_Pos)))
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#define OPAMP_STATUS_MASK 0x07ul /**< \brief (OPAMP_STATUS) MASK Register */
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/* -------- OPAMP_OPAMPCTRL : (OPAMP Offset: 0x04) (R/W 32) OPAMP n Control -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint32_t :1; /*!< bit: 0 Reserved */
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uint32_t ENABLE:1; /*!< bit: 1 Operational Amplifier Enable */
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uint32_t ANAOUT:1; /*!< bit: 2 Analog Output */
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uint32_t BIAS:2; /*!< bit: 3.. 4 Bias Selection */
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uint32_t :1; /*!< bit: 5 Reserved */
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uint32_t RUNSTDBY:1; /*!< bit: 6 Run in Standby */
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uint32_t ONDEMAND:1; /*!< bit: 7 On Demand Control */
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uint32_t RES2OUT:1; /*!< bit: 8 Resistor ladder To Output */
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uint32_t RES2VCC:1; /*!< bit: 9 Resistor ladder To VCC */
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uint32_t RES1EN:1; /*!< bit: 10 Resistor 1 Enable */
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uint32_t RES1MUX:2; /*!< bit: 11..12 Resistor 1 Mux */
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uint32_t POTMUX:3; /*!< bit: 13..15 Potentiometer Selection */
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uint32_t MUXPOS:3; /*!< bit: 16..18 Positive Input Mux Selection */
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uint32_t :1; /*!< bit: 19 Reserved */
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uint32_t MUXNEG:3; /*!< bit: 20..22 Negative Input Mux Selection */
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uint32_t :9; /*!< bit: 23..31 Reserved */
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} bit; /*!< Structure used for bit access */
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uint32_t reg; /*!< Type used for register access */
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} OPAMP_OPAMPCTRL_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define OPAMP_OPAMPCTRL_OFFSET 0x04 /**< \brief (OPAMP_OPAMPCTRL offset) OPAMP n Control */
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#define OPAMP_OPAMPCTRL_RESETVALUE 0x00000000ul /**< \brief (OPAMP_OPAMPCTRL reset_value) OPAMP n Control */
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#define OPAMP_OPAMPCTRL_ENABLE_Pos 1 /**< \brief (OPAMP_OPAMPCTRL) Operational Amplifier Enable */
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#define OPAMP_OPAMPCTRL_ENABLE (0x1ul << OPAMP_OPAMPCTRL_ENABLE_Pos)
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#define OPAMP_OPAMPCTRL_ANAOUT_Pos 2 /**< \brief (OPAMP_OPAMPCTRL) Analog Output */
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#define OPAMP_OPAMPCTRL_ANAOUT (0x1ul << OPAMP_OPAMPCTRL_ANAOUT_Pos)
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#define OPAMP_OPAMPCTRL_BIAS_Pos 3 /**< \brief (OPAMP_OPAMPCTRL) Bias Selection */
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#define OPAMP_OPAMPCTRL_BIAS_Msk (0x3ul << OPAMP_OPAMPCTRL_BIAS_Pos)
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#define OPAMP_OPAMPCTRL_BIAS(value) ((OPAMP_OPAMPCTRL_BIAS_Msk & ((value) << OPAMP_OPAMPCTRL_BIAS_Pos)))
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#define OPAMP_OPAMPCTRL_RUNSTDBY_Pos 6 /**< \brief (OPAMP_OPAMPCTRL) Run in Standby */
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#define OPAMP_OPAMPCTRL_RUNSTDBY (0x1ul << OPAMP_OPAMPCTRL_RUNSTDBY_Pos)
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#define OPAMP_OPAMPCTRL_ONDEMAND_Pos 7 /**< \brief (OPAMP_OPAMPCTRL) On Demand Control */
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#define OPAMP_OPAMPCTRL_ONDEMAND (0x1ul << OPAMP_OPAMPCTRL_ONDEMAND_Pos)
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#define OPAMP_OPAMPCTRL_RES2OUT_Pos 8 /**< \brief (OPAMP_OPAMPCTRL) Resistor ladder To Output */
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#define OPAMP_OPAMPCTRL_RES2OUT (0x1ul << OPAMP_OPAMPCTRL_RES2OUT_Pos)
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#define OPAMP_OPAMPCTRL_RES2VCC_Pos 9 /**< \brief (OPAMP_OPAMPCTRL) Resistor ladder To VCC */
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#define OPAMP_OPAMPCTRL_RES2VCC (0x1ul << OPAMP_OPAMPCTRL_RES2VCC_Pos)
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#define OPAMP_OPAMPCTRL_RES1EN_Pos 10 /**< \brief (OPAMP_OPAMPCTRL) Resistor 1 Enable */
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#define OPAMP_OPAMPCTRL_RES1EN (0x1ul << OPAMP_OPAMPCTRL_RES1EN_Pos)
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#define OPAMP_OPAMPCTRL_RES1MUX_Pos 11 /**< \brief (OPAMP_OPAMPCTRL) Resistor 1 Mux */
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#define OPAMP_OPAMPCTRL_RES1MUX_Msk (0x3ul << OPAMP_OPAMPCTRL_RES1MUX_Pos)
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#define OPAMP_OPAMPCTRL_RES1MUX(value) ((OPAMP_OPAMPCTRL_RES1MUX_Msk & ((value) << OPAMP_OPAMPCTRL_RES1MUX_Pos)))
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#define OPAMP_OPAMPCTRL_POTMUX_Pos 13 /**< \brief (OPAMP_OPAMPCTRL) Potentiometer Selection */
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#define OPAMP_OPAMPCTRL_POTMUX_Msk (0x7ul << OPAMP_OPAMPCTRL_POTMUX_Pos)
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#define OPAMP_OPAMPCTRL_POTMUX(value) ((OPAMP_OPAMPCTRL_POTMUX_Msk & ((value) << OPAMP_OPAMPCTRL_POTMUX_Pos)))
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#define OPAMP_OPAMPCTRL_MUXPOS_Pos 16 /**< \brief (OPAMP_OPAMPCTRL) Positive Input Mux Selection */
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#define OPAMP_OPAMPCTRL_MUXPOS_Msk (0x7ul << OPAMP_OPAMPCTRL_MUXPOS_Pos)
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#define OPAMP_OPAMPCTRL_MUXPOS(value) ((OPAMP_OPAMPCTRL_MUXPOS_Msk & ((value) << OPAMP_OPAMPCTRL_MUXPOS_Pos)))
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#define OPAMP_OPAMPCTRL_MUXNEG_Pos 20 /**< \brief (OPAMP_OPAMPCTRL) Negative Input Mux Selection */
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#define OPAMP_OPAMPCTRL_MUXNEG_Msk (0x7ul << OPAMP_OPAMPCTRL_MUXNEG_Pos)
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#define OPAMP_OPAMPCTRL_MUXNEG(value) ((OPAMP_OPAMPCTRL_MUXNEG_Msk & ((value) << OPAMP_OPAMPCTRL_MUXNEG_Pos)))
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#define OPAMP_OPAMPCTRL_MASK 0x0077FFDEul /**< \brief (OPAMP_OPAMPCTRL) MASK Register */
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/** \brief OPAMP hardware registers */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef struct {
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__IO OPAMP_CTRLA_Type CTRLA; /**< \brief Offset: 0x00 (R/W 8) Control A */
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RoReg8 Reserved1[0x1];
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__I OPAMP_STATUS_Type STATUS; /**< \brief Offset: 0x02 (R/ 8) Status */
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RoReg8 Reserved2[0x1];
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__IO OPAMP_OPAMPCTRL_Type OPAMPCTRL[3]; /**< \brief Offset: 0x04 (R/W 32) OPAMP n Control */
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} Opamp;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/*@}*/
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#endif /* _SAML21_OPAMP_COMPONENT_ */
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