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de486ff79f
Tested on the following Freescale Kinetis K60 CPUs: - MK60DN512VLL10 The port should with a high probability also support the following variations of the above CPUs (untested): - MK60DN256VLL10 And possibly also: - MK60DX256VLL10 - MK60DX512VLL10 - MK60DN512VLQ10 - MK60DN256VLQ10 - MK60DX256VLQ10 - MK60DN512VMC10 - MK60DN256VMC10 - MK60DX256VMC10 - MK60DN512VMD10 - MK60DX256VMD10 - MK60DN256VMD10 Currently not working on the following CPUs (Missing PIT channel chaining necessary for kinetis_common/periph/timer implementation): - MK60DN256ZVLL10 - MK60DN512ZVLL10 - MK60DX256ZVLL10 - MK60DX512ZVLL10 - MK60DN512ZVLQ10 - MK60DN256ZVLQ10 - MK60DX256ZVLQ10 - MK60DN512ZVMC10 - MK60DN256ZVMC10 - MK60DX256ZVMC10 - MK60DN512ZVMD10 - MK60DX256ZVMD10 - MK60DN256ZVMD10 Regarding header files from Freescale: dist/tools/licenses: Add Freescale CMSIS PAL license pattern Redistribution is OK according to: https://community.freescale.com/message/477976?et=watches.email.thread#477976 Archive copy in case the above link disappears: https://web.archive.org/web/20150328073057/https://community.freescale.com/message/477976?et=watches.email.thread Applies to: - MK60DZ10.h (K60 variant)
81 lines
1.7 KiB
C
81 lines
1.7 KiB
C
/*
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* Copyright (C) 2015 Eistec AB
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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#ifndef SYSTEM_MK60D10_H_
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#define SYSTEM_MK60D10_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include <stdint.h>
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/**
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* @ingroup cpu_k60
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* @{
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*
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* @file
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* @brief Device specific configuration file for MK60D10 (header file)
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*/
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/**
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* \brief Current core clock frequency
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*
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* MCGOUTCLK divided by OUTDIV1 clocks the ARM Cortex-M4 core.
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*/
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extern uint32_t SystemCoreClock;
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/**
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* \brief Current system clock frequency
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*
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* MCGOUTCLK divided by OUTDIV1 clocks the crossbar switch and bus masters
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* directly connected to the crossbar. In addition, this clock is used for UART0
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* and UART1.
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*/
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extern uint32_t SystemSysClock;
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/**
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* \brief Current bus clock frequency
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*
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* MCGOUTCLK divided by OUTDIV2 clocks the bus slaves and peripheral (excluding
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* memories).
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*/
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extern uint32_t SystemBusClock;
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/**
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* \brief Current FlexBus clock frequency
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*
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* MCGOUTCLK divided by OUTDIV3 clocks the external FlexBus interface.
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*/
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extern uint32_t SystemFlexBusClock;
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/**
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* \brief Current flash clock frequency
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*
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* MCGOUTCLK divided by OUTDIV4 clocks the flash memory.
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*/
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extern uint32_t SystemFlashClock;
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/**
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* \brief Updates all of the SystemCoreClock variables.
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*
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* It must be called whenever the core clock is changed during program
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* execution. SystemCoreClockUpdate() evaluates the clock register settings and
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* calculates the current core clock.
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*/
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void SystemCoreClockUpdate(void);
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* #if !defined(SYSTEM_MK60D10_H_) */
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