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https://github.com/RIOT-OS/RIOT.git
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ddbeccb195
This adds support for the Atmel SAM E54 Xplained Pro Evaluation Kit. Only basic functionality has been enabled.
175 lines
4.0 KiB
C
175 lines
4.0 KiB
C
/*
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* Copyright (C) 2019 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_same54-xpro
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for the Microchip SAM E54 Xplained
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* Pro board
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*
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* @author Benjamin Valentin <benjamin.valentin@ml-pa.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief GCLK reference speed
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*/
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#define CLOCK_CORECLOCK (120000000U)
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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static const tc32_conf_t timer_config[] = {
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{ /* Timer 0 - System Clock */
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.dev = TC0,
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.irq = TC0_IRQn,
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.mclk = &MCLK->APBAMASK.reg,
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.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = GCLK_PCHCTRL_GEN(5),
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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.flags = TC_CTRLA_MODE_COUNT32,
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},
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{ /* Timer 1 */
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.dev = TC2,
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.irq = TC2_IRQn,
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.mclk = &MCLK->APBBMASK.reg,
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.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
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.gclk_id = TC2_GCLK_ID,
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.gclk_src = GCLK_PCHCTRL_GEN(5),
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.prescaler = TC_CTRLA_PRESCALER_DIV8,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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/* Timer 0 configuration */
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#define TIMER_0_CHANNELS 2
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#define TIMER_0_ISR isr_tc0
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/* Timer 1 configuration */
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#define TIMER_1_CHANNELS 2
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#define TIMER_1_ISR isr_tc2
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#define TIMER_NUMOF (sizeof(timer_config)/sizeof(timer_config[0]))
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{ /* Virtual COM Port */
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.dev = &SERCOM2->USART,
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.rx_pin = GPIO_PIN(PB,24),
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.tx_pin = GPIO_PIN(PB,25),
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.mux = GPIO_MUX_D,
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.rx_pad = UART_PAD_RX_1,
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.tx_pad = UART_PAD_TX_0,
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.flags = UART_FLAG_NONE,
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.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
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}
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};
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/* interrupt function name mapping */
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#define UART_0_ISR isr_sercom2_2
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = &(SERCOM6->SPI),
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.miso_pin = GPIO_PIN(PC, 7),
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.mosi_pin = GPIO_PIN(PC, 4),
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.clk_pin = GPIO_PIN(PC, 5),
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.miso_mux = GPIO_MUX_C,
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.mosi_mux = GPIO_MUX_C,
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.clk_mux = GPIO_MUX_C,
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.miso_pad = SPI_PAD_MISO_3,
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.mosi_pad = SPI_PAD_MOSI_0_SCK_1
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}
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};
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#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = &(SERCOM7->I2CM),
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PD, 9),
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.sda_pin = GPIO_PIN(PD, 8),
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.mux = GPIO_MUX_C,
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.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
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.flags = I2C_FLAG_NONE
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @name RTC configuration
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* @{
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*/
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#define RTC_NUMOF (1)
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#define EXTERNAL_OSC32_SOURCE 1
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#define INTERNAL_OSC32_SOURCE 0
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#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#define RTT_FREQUENCY (32768U)
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#define RTT_MAX_VALUE (0xffffffffU)
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#define RTT_NUMOF (1)
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/** @} */
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/**
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* @name USB peripheral configuration
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* @{
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*/
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static const sam0_common_usb_config_t sam_usbdev_config[] = {
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{
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.dm = GPIO_PIN(PA, 24),
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.dp = GPIO_PIN(PA, 25),
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.d_mux = GPIO_MUX_H,
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.device = &USB->DEVICE,
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}
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};
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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