mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2025-01-18 12:52:44 +01:00
Koen Zandberg
d8ec0b292f
This PR sets the DMA configuration for the UART peripherals on the stm32f4 boards to the undef value to disable the DMA. This to prevent from accidentally configuring the DMA to stream 0 channel 0 when enabling DMA.
162 lines
3.9 KiB
C
162 lines
3.9 KiB
C
/*
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* Copyright (C) 2016 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_nucleo-f410rb
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the nucleo-f410rb board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "f4/cfg_clock_96_8_1.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#include "cfg_timer_tim5.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART2,
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.rcc_mask = RCC_APB1ENR_USART2EN,
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.rx_pin = GPIO_PIN(PORT_A, 3),
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.tx_pin = GPIO_PIN(PORT_A, 2),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB1,
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.irqn = USART2_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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#endif
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},
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF7,
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.tx_af = GPIO_AF7,
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.bus = APB2,
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.irqn = USART1_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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#endif
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},
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{
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.dev = USART6,
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.rcc_mask = RCC_APB2ENR_USART6EN,
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.rx_pin = GPIO_PIN(PORT_A, 12),
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.tx_pin = GPIO_PIN(PORT_A, 11),
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.rx_af = GPIO_AF8,
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.tx_af = GPIO_AF8,
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.bus = APB2,
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.irqn = USART6_IRQn,
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#ifdef MODULE_PERIPH_DMA
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.dma = DMA_STREAM_UNDEF,
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.dma_chan = UINT8_MAX,
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#endif
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}
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};
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/* assign ISR vector names */
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#define UART_0_ISR (isr_usart2)
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#define UART_0_DMA_ISR (isr_dma1_stream6)
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#define UART_1_ISR (isr_usart1)
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#define UART_1_DMA_ISR (isr_dma2_stream7)
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#define UART_2_ISR (isr_usart6)
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#define UART_2_DMA_ISR (isr_dma2_stream7)
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/* deduct number of defined UART interfaces */
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI configuration
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*
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* @note The spi_divtable is auto-generated from
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* `cpu/stm32_common/dist/spi_divtable/spi_divtable.c`
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* @{
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*/
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static const uint8_t spi_divtable[2][5] = {
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{ /* for APB1 @ 48000000Hz */
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7, /* -> 187500Hz */
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6, /* -> 375000Hz */
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5, /* -> 750000Hz */
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2, /* -> 6000000Hz */
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1 /* -> 12000000Hz */
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},
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{ /* for APB2 @ 96000000Hz */
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7, /* -> 375000Hz */
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7, /* -> 375000Hz */
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6, /* -> 750000Hz */
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3, /* -> 6000000Hz */
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2 /* -> 12000000Hz */
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}
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};
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = GPIO_PIN(PORT_A, 4),
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.mosi_af = GPIO_AF5,
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.miso_af = GPIO_AF5,
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.sclk_af = GPIO_AF5,
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.cs_af = GPIO_AF5,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name ADC configuration
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*
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* Note that we do not configure all ADC channels,
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* and not in the STM32F410 order. Instead, we
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* just define 6 ADC channels, for the Nucleo
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* Arduino header pins A0-A5
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*
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* @{
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*/
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#define ADC_NUMOF (6U)
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#define ADC_CONFIG { \
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{GPIO_PIN(PORT_A, 0), 0, 0}, \
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{GPIO_PIN(PORT_A, 1), 0, 1}, \
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{GPIO_PIN(PORT_A, 4), 0, 4}, \
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{GPIO_PIN(PORT_B, 0), 0, 8}, \
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{GPIO_PIN(PORT_C, 1), 0, 11}, \
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{GPIO_PIN(PORT_C, 0), 0, 10}, \
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}
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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