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491 lines
24 KiB
C
491 lines
24 KiB
C
/******************************************************************************
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* Filename: hw_adi_4_aux_h
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* Revised: 2017-05-04 21:56:26 +0200 (Thu, 04 May 2017)
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* Revision: 48904
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __HW_ADI_4_AUX_H__
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#define __HW_ADI_4_AUX_H__
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//*****************************************************************************
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//
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// This section defines the register offsets of
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// ADI_4_AUX component
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//
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//*****************************************************************************
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// Internal
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#define ADI_4_AUX_O_MUX0 0x00000000
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// Internal
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#define ADI_4_AUX_O_MUX1 0x00000001
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// Internal
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#define ADI_4_AUX_O_MUX2 0x00000002
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// Internal
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#define ADI_4_AUX_O_MUX3 0x00000003
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// Current Source
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#define ADI_4_AUX_O_ISRC 0x00000004
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// Comparator
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#define ADI_4_AUX_O_COMP 0x00000005
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// Internal
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#define ADI_4_AUX_O_MUX4 0x00000007
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// ADC Control 0
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#define ADI_4_AUX_O_ADC0 0x00000008
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// ADC Control 1
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#define ADI_4_AUX_O_ADC1 0x00000009
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// ADC Reference 0
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#define ADI_4_AUX_O_ADCREF0 0x0000000A
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// ADC Reference 1
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#define ADI_4_AUX_O_ADCREF1 0x0000000B
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_MUX0
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//
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//*****************************************************************************
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// Field: [3:0] COMPA_REF
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// ADCVREFP Internal. Only to be used through TI provided API.
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// VDDS Internal. Only to be used through TI provided API.
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// VSS Internal. Only to be used through TI provided API.
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// DCOUPL Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX0_COMPA_REF_W 4
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#define ADI_4_AUX_MUX0_COMPA_REF_M 0x0000000F
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#define ADI_4_AUX_MUX0_COMPA_REF_S 0
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#define ADI_4_AUX_MUX0_COMPA_REF_ADCVREFP 0x00000008
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#define ADI_4_AUX_MUX0_COMPA_REF_VDDS 0x00000004
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#define ADI_4_AUX_MUX0_COMPA_REF_VSS 0x00000002
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#define ADI_4_AUX_MUX0_COMPA_REF_DCOUPL 0x00000001
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#define ADI_4_AUX_MUX0_COMPA_REF_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_MUX1
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//
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//*****************************************************************************
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// Field: [7:0] COMPA_IN
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// AUXIO0 Internal. Only to be used through TI provided API.
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// AUXIO1 Internal. Only to be used through TI provided API.
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// AUXIO2 Internal. Only to be used through TI provided API.
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// AUXIO3 Internal. Only to be used through TI provided API.
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// AUXIO4 Internal. Only to be used through TI provided API.
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// AUXIO5 Internal. Only to be used through TI provided API.
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// AUXIO6 Internal. Only to be used through TI provided API.
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// AUXIO7 Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX1_COMPA_IN_W 8
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#define ADI_4_AUX_MUX1_COMPA_IN_M 0x000000FF
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#define ADI_4_AUX_MUX1_COMPA_IN_S 0
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO0 0x00000080
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO1 0x00000040
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO2 0x00000020
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO3 0x00000010
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO4 0x00000008
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO5 0x00000004
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO6 0x00000002
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#define ADI_4_AUX_MUX1_COMPA_IN_AUXIO7 0x00000001
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#define ADI_4_AUX_MUX1_COMPA_IN_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_MUX2
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//
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//*****************************************************************************
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// Field: [7:3] ADCCOMPB_IN
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// VDDS Internal. Only to be used through TI provided API.
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// VSS Internal. Only to be used through TI provided API.
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// DCOUPL Internal. Only to be used through TI provided API.
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// ATEST1 Internal. Only to be used through TI provided API.
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// ATEST0 Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_W 5
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_M 0x000000F8
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_S 3
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_VDDS 0x00000080
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_VSS 0x00000040
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_DCOUPL 0x00000020
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST1 0x00000010
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_ATEST0 0x00000008
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#define ADI_4_AUX_MUX2_ADCCOMPB_IN_NC 0x00000000
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// Field: [2:0] COMPB_REF
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// VDDS Internal. Only to be used through TI provided API.
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// VSS Internal. Only to be used through TI provided API.
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// DCOUPL Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX2_COMPB_REF_W 3
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#define ADI_4_AUX_MUX2_COMPB_REF_M 0x00000007
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#define ADI_4_AUX_MUX2_COMPB_REF_S 0
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#define ADI_4_AUX_MUX2_COMPB_REF_VDDS 0x00000004
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#define ADI_4_AUX_MUX2_COMPB_REF_VSS 0x00000002
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#define ADI_4_AUX_MUX2_COMPB_REF_DCOUPL 0x00000001
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#define ADI_4_AUX_MUX2_COMPB_REF_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_MUX3
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//
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//*****************************************************************************
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// Field: [7:0] ADCCOMPB_IN
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// AUXIO0 Internal. Only to be used through TI provided API.
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// AUXIO1 Internal. Only to be used through TI provided API.
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// AUXIO2 Internal. Only to be used through TI provided API.
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// AUXIO3 Internal. Only to be used through TI provided API.
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// AUXIO4 Internal. Only to be used through TI provided API.
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// AUXIO5 Internal. Only to be used through TI provided API.
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// AUXIO6 Internal. Only to be used through TI provided API.
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// AUXIO7 Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_W 8
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_M 0x000000FF
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_S 0
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO0 0x00000080
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO1 0x00000040
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO2 0x00000020
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO3 0x00000010
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO4 0x00000008
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO5 0x00000004
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO6 0x00000002
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_AUXIO7 0x00000001
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#define ADI_4_AUX_MUX3_ADCCOMPB_IN_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_ISRC
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//
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//*****************************************************************************
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// Field: [7:2] TRIM
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//
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// Adjust current from current source.
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//
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// Output currents may be combined to get desired total current.
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// ENUMs:
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// 11P75U 11.75 uA
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// 4P5U 4.5 uA
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// 2P0U 2.0 uA
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// 1P0U 1.0 uA
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// 0P5U 0.5 uA
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// 0P25U 0.25 uA
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// NC No current connected
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#define ADI_4_AUX_ISRC_TRIM_W 6
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#define ADI_4_AUX_ISRC_TRIM_M 0x000000FC
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#define ADI_4_AUX_ISRC_TRIM_S 2
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#define ADI_4_AUX_ISRC_TRIM_11P75U 0x00000080
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#define ADI_4_AUX_ISRC_TRIM_4P5U 0x00000040
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#define ADI_4_AUX_ISRC_TRIM_2P0U 0x00000020
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#define ADI_4_AUX_ISRC_TRIM_1P0U 0x00000010
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#define ADI_4_AUX_ISRC_TRIM_0P5U 0x00000008
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#define ADI_4_AUX_ISRC_TRIM_0P25U 0x00000004
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#define ADI_4_AUX_ISRC_TRIM_NC 0x00000000
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// Field: [0] EN
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//
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// Current source enable
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#define ADI_4_AUX_ISRC_EN 0x00000001
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#define ADI_4_AUX_ISRC_EN_M 0x00000001
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#define ADI_4_AUX_ISRC_EN_S 0
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_COMP
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//
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//*****************************************************************************
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// Field: [7] COMPA_REF_RES_EN
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//
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// Enables 400kohm resistance from COMPA reference node to ground. Used with
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// COMPA_REF_CURR_EN to generate voltage reference for cap-sense.
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#define ADI_4_AUX_COMP_COMPA_REF_RES_EN 0x00000080
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#define ADI_4_AUX_COMP_COMPA_REF_RES_EN_M 0x00000080
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#define ADI_4_AUX_COMP_COMPA_REF_RES_EN_S 7
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// Field: [6] COMPA_REF_CURR_EN
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//
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// Enables 2uA IPTAT current from ISRC to COMPA reference node. Requires
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// ISRC.EN = 1. Used with COMPA_REF_RES_EN to generate voltage reference for
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// cap-sense.
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#define ADI_4_AUX_COMP_COMPA_REF_CURR_EN 0x00000040
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#define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_M 0x00000040
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#define ADI_4_AUX_COMP_COMPA_REF_CURR_EN_S 6
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// Field: [5:3] COMPB_TRIM
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//
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// COMPB voltage reference trim temperature coded:
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// ENUMs:
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// DIV4 Divide reference by 4
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// DIV3 Divide reference by 3
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// DIV2 Divide reference by 2
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// DIV1 No reference division
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#define ADI_4_AUX_COMP_COMPB_TRIM_W 3
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#define ADI_4_AUX_COMP_COMPB_TRIM_M 0x00000038
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#define ADI_4_AUX_COMP_COMPB_TRIM_S 3
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#define ADI_4_AUX_COMP_COMPB_TRIM_DIV4 0x00000038
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#define ADI_4_AUX_COMP_COMPB_TRIM_DIV3 0x00000018
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#define ADI_4_AUX_COMP_COMPB_TRIM_DIV2 0x00000008
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#define ADI_4_AUX_COMP_COMPB_TRIM_DIV1 0x00000000
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// Field: [2] COMPB_EN
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//
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// COMPB enable
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#define ADI_4_AUX_COMP_COMPB_EN 0x00000004
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#define ADI_4_AUX_COMP_COMPB_EN_M 0x00000004
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#define ADI_4_AUX_COMP_COMPB_EN_S 2
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// Field: [0] COMPA_EN
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//
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// COMPA enable
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#define ADI_4_AUX_COMP_COMPA_EN 0x00000001
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#define ADI_4_AUX_COMP_COMPA_EN_M 0x00000001
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#define ADI_4_AUX_COMP_COMPA_EN_S 0
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_MUX4
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//
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//*****************************************************************************
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// Field: [7:0] COMPA_REF
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//
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// Internal. Only to be used through TI provided API.
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// ENUMs:
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// AUXIO0 Internal. Only to be used through TI provided API.
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// AUXIO1 Internal. Only to be used through TI provided API.
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// AUXIO2 Internal. Only to be used through TI provided API.
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// AUXIO3 Internal. Only to be used through TI provided API.
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// AUXIO4 Internal. Only to be used through TI provided API.
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// AUXIO5 Internal. Only to be used through TI provided API.
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// AUXIO6 Internal. Only to be used through TI provided API.
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// AUXIO7 Internal. Only to be used through TI provided API.
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// NC Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_MUX4_COMPA_REF_W 8
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#define ADI_4_AUX_MUX4_COMPA_REF_M 0x000000FF
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#define ADI_4_AUX_MUX4_COMPA_REF_S 0
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO0 0x00000080
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO1 0x00000040
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO2 0x00000020
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO3 0x00000010
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO4 0x00000008
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO5 0x00000004
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO6 0x00000002
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#define ADI_4_AUX_MUX4_COMPA_REF_AUXIO7 0x00000001
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#define ADI_4_AUX_MUX4_COMPA_REF_NC 0x00000000
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_ADC0
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//
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//*****************************************************************************
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// Field: [7] SMPL_MODE
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//
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// ADC Sampling mode:
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//
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// 0: Synchronous mode
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// 1: Asynchronous mode
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//
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// The ADC does a sample-and-hold before conversion. In synchronous mode the
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// sampling starts when the ADC clock detects a rising edge on the trigger
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// signal. Jitter/uncertainty will be inferred in the detection if the trigger
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// signal originates from a domain that is asynchronous to the ADC clock.
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// SMPL_CYCLE_EXP determines the the duration of sampling.
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// Conversion starts immediately after sampling ends.
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//
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// In asynchronous mode the sampling is continuous when enabled. Sampling ends
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// and conversion starts immediately with the rising edge of the trigger
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// signal. Sampling restarts when the conversion has finished.
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// Asynchronous mode is useful when it is important to avoid jitter in the
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// sampling instant of an externally driven signal
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#define ADI_4_AUX_ADC0_SMPL_MODE 0x00000080
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#define ADI_4_AUX_ADC0_SMPL_MODE_M 0x00000080
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#define ADI_4_AUX_ADC0_SMPL_MODE_S 7
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// Field: [6:3] SMPL_CYCLE_EXP
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//
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// Controls the sampling duration before conversion when the ADC is operated in
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// synchronous mode (SMPL_MODE = 0). The setting has no effect in asynchronous
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// mode. The sampling duration is given as 2^(SMPL_CYCLE_EXP + 1) / 6 us.
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// ENUMs:
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// 10P9_MS 65536x 6 MHz clock periods = 10.9ms
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// 5P46_MS 32768x 6 MHz clock periods = 5.46ms
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// 2P73_MS 16384x 6 MHz clock periods = 2.73ms
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// 1P37_MS 8192x 6 MHz clock periods = 1.37ms
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// 682_US 4096x 6 MHz clock periods = 682us
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// 341_US 2048x 6 MHz clock periods = 341us
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// 170_US 1024x 6 MHz clock periods = 170us
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// 85P3_US 512x 6 MHz clock periods = 85.3us
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// 42P6_US 256x 6 MHz clock periods = 42.6us
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// 21P3_US 128x 6 MHz clock periods = 21.3us
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// 10P6_US 64x 6 MHz clock periods = 10.6us
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// 5P3_US 32x 6 MHz clock periods = 5.3us
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// 2P7_US 16x 6 MHz clock periods = 2.7us
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_W 4
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_M 0x00000078
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_S 3
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P9_MS 0x00000078
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P46_MS 0x00000070
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P73_MS 0x00000068
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_1P37_MS 0x00000060
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_682_US 0x00000058
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_341_US 0x00000050
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_170_US 0x00000048
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_85P3_US 0x00000040
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_42P6_US 0x00000038
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_21P3_US 0x00000030
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_10P6_US 0x00000028
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_5P3_US 0x00000020
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#define ADI_4_AUX_ADC0_SMPL_CYCLE_EXP_2P7_US 0x00000018
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// Field: [1] RESET_N
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//
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// Reset ADC digital subchip, active low. ADC must be reset every time it is
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// reconfigured.
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//
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// 0: Reset
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// 1: Normal operation
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#define ADI_4_AUX_ADC0_RESET_N 0x00000002
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#define ADI_4_AUX_ADC0_RESET_N_M 0x00000002
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#define ADI_4_AUX_ADC0_RESET_N_S 1
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// Field: [0] EN
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//
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// ADC Enable
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//
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// 0: Disable
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// 1: Enable
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#define ADI_4_AUX_ADC0_EN 0x00000001
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#define ADI_4_AUX_ADC0_EN_M 0x00000001
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#define ADI_4_AUX_ADC0_EN_S 0
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_ADC1
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//
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//*****************************************************************************
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// Field: [0] SCALE_DIS
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_ADC1_SCALE_DIS 0x00000001
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#define ADI_4_AUX_ADC1_SCALE_DIS_M 0x00000001
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#define ADI_4_AUX_ADC1_SCALE_DIS_S 0
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//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_ADCREF0
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//
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//*****************************************************************************
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// Field: [6] REF_ON_IDLE
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//
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// Keep ADCREF powered up in IDLE state when ADC0.SMPL_MODE = 0.
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//
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// Set to 1 if ADC0.SMPL_CYCLE_EXP is less than 6 (21.3us sampling time)
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#define ADI_4_AUX_ADCREF0_REF_ON_IDLE 0x00000040
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#define ADI_4_AUX_ADCREF0_REF_ON_IDLE_M 0x00000040
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#define ADI_4_AUX_ADCREF0_REF_ON_IDLE_S 6
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// Field: [5] IOMUX
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//
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// Internal. Only to be used through TI provided API.
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#define ADI_4_AUX_ADCREF0_IOMUX 0x00000020
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#define ADI_4_AUX_ADCREF0_IOMUX_M 0x00000020
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#define ADI_4_AUX_ADCREF0_IOMUX_S 5
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// Field: [4] EXT
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//
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// Internal. Only to be used through TI provided API.
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|
#define ADI_4_AUX_ADCREF0_EXT 0x00000010
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#define ADI_4_AUX_ADCREF0_EXT_M 0x00000010
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#define ADI_4_AUX_ADCREF0_EXT_S 4
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|
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// Field: [3] SRC
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//
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// ADC reference source:
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//
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// 0: Fixed reference = 4.3V
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// 1: Relative reference = VDDS
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#define ADI_4_AUX_ADCREF0_SRC 0x00000008
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#define ADI_4_AUX_ADCREF0_SRC_M 0x00000008
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#define ADI_4_AUX_ADCREF0_SRC_S 3
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|
|
|
// Field: [0] EN
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//
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// ADC reference module enable:
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//
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// 0: ADC reference module powered down
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// 1: ADC reference module enabled
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#define ADI_4_AUX_ADCREF0_EN 0x00000001
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|
#define ADI_4_AUX_ADCREF0_EN_M 0x00000001
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#define ADI_4_AUX_ADCREF0_EN_S 0
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|
|
|
//*****************************************************************************
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//
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// Register: ADI_4_AUX_O_ADCREF1
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//
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//*****************************************************************************
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// Field: [5:0] VTRIM
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//
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// Trim output voltage of ADC fixed reference (64 steps, 2's complement).
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// Applies only for ADCREF0.SRC = 0.
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//
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// Examples:
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// 0x00 - nominal voltage 1.43V
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// 0x01 - nominal + 0.4% 1.435V
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// 0x3F - nominal - 0.4% 1.425V
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// 0x1F - maximum voltage 1.6V
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// 0x20 - minimum voltage 1.3V
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#define ADI_4_AUX_ADCREF1_VTRIM_W 6
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|
#define ADI_4_AUX_ADCREF1_VTRIM_M 0x0000003F
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#define ADI_4_AUX_ADCREF1_VTRIM_S 0
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|
|
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#endif // __ADI_4_AUX__
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