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107 lines
2.7 KiB
C
107 lines
2.7 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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* 2016 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup cpu_stm32f0 STM32F0
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* @brief STM32F0 specific code
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* @ingroup cpu
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* @{
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*
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* @file
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* @brief Implementation specific CPU configuration options
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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*/
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#ifndef CPU_CONF_H
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#define CPU_CONF_H
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#include "cpu_conf_common.h"
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#ifdef CPU_MODEL_STM32F051R8
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#include "vendor/stm32f051x8.h"
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#endif
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#ifdef CPU_MODEL_STM32F091RC
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#include "vendor/stm32f091xc.h"
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#endif
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#ifdef CPU_MODEL_STM32F072RB
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#include "vendor/stm32f072xb.h"
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#endif
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#ifdef CPU_MODEL_STM32F070RB
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#include "vendor/stm32f070xb.h"
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#endif
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#ifdef CPU_MODEL_STM32F030R8
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#include "vendor/stm32f030x8.h"
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#endif
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#ifdef CPU_MODEL_STM32F042K6
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#include "vendor/stm32f042x6.h"
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#endif
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#ifdef CPU_MODEL_STM32F031K6
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#include "vendor/stm32f031x6.h"
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#endif
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ARM Cortex-M specific CPU configuration
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* @{
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*/
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#define CPU_DEFAULT_IRQ_PRIO (1U)
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#if defined(CPU_MODEL_STM32F030R8)
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#define CPU_IRQ_NUMOF (29U)
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#elif defined(CPU_MODEL_STM32F031K6)
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#define CPU_IRQ_NUMOF (28U)
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#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F091RC)
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#define CPU_IRQ_NUMOF (31U)
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#else /* CPU_MODEL_STM32F042K6, CPU_MODEL_STM32F070RB, CPU_MODEL_STM32F072RB */
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#define CPU_IRQ_NUMOF (32U)
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#endif
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/** @} */
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/**
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* @brief Flash page configuration
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*
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* STM32F03x, STM32F04x, STM32F05x: up to 64 pages of 1K
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* STM32F07x, STM32F09x: up to 128 pages of 2K
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*
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* @{
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*/
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#if defined(CPU_MODEL_STM32F091RC) || defined(CPU_MODEL_STM32F072RB)
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#define FLASHPAGE_SIZE (2048U)
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#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F042K6) \
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|| defined(CPU_MODEL_STM32F070RB) || defined(CPU_MODEL_STM32F030R8)
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#define FLASHPAGE_SIZE (1024U)
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#endif
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#if defined(CPU_MODEL_STM32F091RC)
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#define FLASHPAGE_NUMOF (128U)
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#elif defined(CPU_MODEL_STM32F051R8) || defined(CPU_MODEL_STM32F072RB) \
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|| defined(CPU_MODEL_STM32F030R8) || defined(CPU_MODEL_STM32F070RB)
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#define FLASHPAGE_NUMOF (64U)
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#elif defined(CPU_MODEL_STM32F042K6)
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#define FLASHPAGE_NUMOF (32U)
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#endif
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/* The minimum block size which can be written is 2B. However, the erase
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* block is always FLASHPAGE_SIZE.
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*/
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#define FLASHPAGE_RAW_BLOCKSIZE (2U)
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/* Writing should be always 4 bytes aligned */
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#define FLASHPAGE_RAW_ALIGNMENT (4U)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* CPU_CONF_H */
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/** @} */
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