mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
264 lines
8.6 KiB
Diff
264 lines
8.6 KiB
Diff
*** stock_iot-lab_M3/openwsn/spi.c Thu Apr 24 11:19:40 2014
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--- riot-openwsn-wip/openwsn/spi.c Thu Apr 24 16:55:54 2014
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***************
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*** 0 ****
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--- 1,258 ----
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+ /**
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+ \brief iot-lab_M3 definition of the "spi" bsp module (based on openmoteSTM32 code).
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+
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+ \author Thomas Watteyne <watteyne@eecs.berkeley.edu>, February 2012.
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+ \author Chang Tengfei <tengfei.chang@gmail.com>, July 2012.
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+ \author Alaeddine Weslati <alaeddine.weslati@inria.fr>, January 2014.
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+ */
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+ #include "stm32f10x_lib.h"
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+ #include "stdio.h"
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+ #include "stdint.h"
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+ #include "string.h"
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+ #include "spi.h"
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+ #include "leds_ow.h"
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+
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+ #include "rcc.h"
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+ #include "nvic.h"
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+
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+ #define ENABLE_DEBUG (0)
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+ #include "debug.h"
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+
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+ //=========================== defines =========================================
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+
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+ //=========================== variables =======================================
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+
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+ typedef struct {
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+ // information about the current transaction
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+ uint8_t* pNextTxByte;
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+ uint8_t numTxedBytes;
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+ uint8_t txBytesLeft;
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+ spi_return_t returnType;
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+ uint8_t* pNextRxByte;
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+ uint8_t maxRxBytes;
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+ spi_first_t isFirst;
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+ spi_last_t isLast;
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+ // state of the module
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+ uint8_t busy;
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ // callback when module done
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+ spi_cbt callback;
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+ #endif
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+ } spi_vars_t;
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+
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+ volatile spi_vars_t spi_vars;
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+
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+ //=========================== prototypes ======================================
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+ inline static void RESET_CLR(void) { GPIOC->BRR = 1<<1; }
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+ inline static void RESET_SET(void) { GPIOC->BSRR = 1<<1; }
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+ inline static void CSn_SET(void) { GPIOA->BSRR = 1<<4; }
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+ inline static void CSn_CLR(void) { GPIOA->BRR = 1<<4; }
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+ inline static void SLEEP_CLR(void) { GPIOA->BRR = 1<<2; }
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+
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+ //=========================== public ==========================================
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+
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+ void spi_init() {
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+ // clear variables
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+ memset((void*)&spi_vars,0,sizeof(spi_vars_t));
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+
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+ SPI_InitTypeDef SPI_InitStructure;
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+
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+ //enable SPI1, GPIOA, GPIOB and GPIOC, Clock
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
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+
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+ //Configure SPI-related pins: PA.5 as SCLK pin ,PA.6 as MISO pin, PA.7 as MOSI pin, PA.4 as /SEL pin
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+ GPIO_InitTypeDef GPIO_InitStructure;
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+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_7;
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+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
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+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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+ GPIO_Init(GPIOA, &GPIO_InitStructure);
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+
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+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
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+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
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+ GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
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+ GPIO_Init(GPIOA, &GPIO_InitStructure);
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+
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+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 | GPIO_Pin_2;
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+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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+ GPIO_Init(GPIOA, &GPIO_InitStructure);
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+
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+ GPIO_InitStructure.GPIO_Pin = GPIO_Pin_1;
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+ GPIO_InitStructure.GPIO_Mode = GPIO_Mode_Out_PP;
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+ GPIO_Init(GPIOC, &GPIO_InitStructure);
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+
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+ // force reset
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+ RESET_CLR();
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+ CSn_SET();
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+ SLEEP_CLR();
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+
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+ for (uint16_t j=0;j<0xFFFF;j++); //small wait
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+
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+ RESET_SET();
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+
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+ //Configure SPI1
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+ SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex; //Full-duplex synchronous transfers on two lines
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+ SPI_InitStructure.SPI_Mode = SPI_Mode_Master;//Master Mode
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+ SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b; //8-bit transfer frame format
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+ SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low; //the SCK pin has a low-level idle state
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+ SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge; //the first rising edge on the SCK pin is the MSBit capture strobe,
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+ SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;//Software NSS mode
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+ SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_16;//BaudRate Prescaler = 8
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+ SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;//data order with MSB-first
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+ SPI_InitStructure.SPI_CRCPolynomial = 7;//CRC Polynomial = 7
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+ SPI_Init(SPI1, &SPI_InitStructure);
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+
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+ //enable SPI1
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+ SPI_Cmd(SPI1, ENABLE);
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+
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ //Configure NVIC: Preemption Priority = 1 and Sub Priority = 1
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+ NVIC_InitTypeDef NVIC_InitStructure;
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+ NVIC_InitStructure.NVIC_IRQChannel = SPI1_IRQn;
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+ NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 1;
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+ NVIC_InitStructure.NVIC_IRQChannelSubPriority = 1;
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+ NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
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+ NVIC_Init(&NVIC_InitStructure);
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+ #endif
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+ }
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+
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ void spi_setCallback(spi_cbt cb) {
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+ spi_vars.callback = cb;
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+ }
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+ #endif
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+
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+ void spi_txrx(uint8_t* bufTx,
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+ uint8_t lenbufTx,
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+ spi_return_t returnType,
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+ uint8_t* bufRx,
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+ uint8_t maxLenBufRx,
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+ spi_first_t isFirst,
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+ spi_last_t isLast) {
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+
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ // disable interrupts
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+ NVIC_RESETPRIMASK();
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+ #endif
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+
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+ // register spi frame to send
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+ spi_vars.pNextTxByte = bufTx;
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+ spi_vars.numTxedBytes = 0;
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+ spi_vars.txBytesLeft = lenbufTx;
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+ spi_vars.returnType = returnType;
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+ spi_vars.pNextRxByte = bufRx;
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+ spi_vars.maxRxBytes = maxLenBufRx;
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+ spi_vars.isFirst = isFirst;
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+ spi_vars.isLast = isLast;
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+
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+ // SPI is now busy
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+ spi_vars.busy = 1;
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+
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+
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+ // lower CS signal to have slave listening
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+ if (spi_vars.isFirst==SPI_FIRST) {
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+ GPIO_ResetBits(GPIOA, GPIO_Pin_4);
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+ }
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+
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ // implementation 1. use a callback function when transaction finishes
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+
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+ // write first byte to TX buffer
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+ SPI_I2S_SendData(SPI1,*spi_vars.pNextTxByte);
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+
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+ // re-enable interrupts
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+ NVIC_SETPRIMASK();
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+ #else
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+ // implementation 2. busy wait for each byte to be sent
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+ // send all bytes
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+ while (spi_vars.txBytesLeft>0) {
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+ // write next byte to TX buffer
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+ SPI_I2S_SendData(SPI1,*spi_vars.pNextTxByte);
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+
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+ // busy wait on the interrupt flag
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+ while (SPI_I2S_GetFlagStatus(SPI1,SPI_I2S_FLAG_RXNE) == RESET);
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+
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+ // clear the interrupt flag
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+ SPI_I2S_ClearFlag(SPI1, SPI_I2S_FLAG_RXNE);
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+ // save the byte just received in the RX buffer
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+ switch (spi_vars.returnType) {
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+ case SPI_FIRSTBYTE:
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+ if (spi_vars.numTxedBytes==0) {
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ }
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+ break;
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+ case SPI_BUFFER:
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ spi_vars.pNextRxByte++;
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+ break;
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+ case SPI_LASTBYTE:
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ break;
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+ }
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+ // one byte less to go
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+ spi_vars.pNextTxByte++;
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+ spi_vars.numTxedBytes++;
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+ spi_vars.txBytesLeft--;
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+ }
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+
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+ // put CS signal high to signal end of transmission to slave
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+ if (spi_vars.isLast==SPI_LAST) {
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+ GPIO_SetBits(GPIOA, GPIO_Pin_4);
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+ }
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+
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+ // SPI is not busy anymore
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+ spi_vars.busy = 0;
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+ #endif
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+ }
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+
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+ //=========================== private =========================================
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+
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+ //=========================== interrupt handlers ==============================
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+
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+ kick_scheduler_t spi_isr() {
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+ #ifdef SPI_IN_INTERRUPT_MODE
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+ // save the byte just received in the RX buffer
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+ switch (spi_vars.returnType) {
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+ case SPI_FIRSTBYTE:
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+ if (spi_vars.numTxedBytes==0) {
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ }
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+ break;
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+ case SPI_BUFFER:
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ spi_vars.pNextRxByte++;
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+ break;
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+ case SPI_LASTBYTE:
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+ *spi_vars.pNextRxByte = SPI_I2S_ReceiveData(SPI1);
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+ break;
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+ }
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+
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+ // one byte less to go
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+ spi_vars.pNextTxByte++;
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+ spi_vars.numTxedBytes++;
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+ spi_vars.txBytesLeft--;
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+
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+ if (spi_vars.txBytesLeft>0) {
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+ // write next byte to TX buffer
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+ SPI_SendData(SPI1,*spi_vars.pNextTxByte);
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+ } else {
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+ // put CS signal high to signal end of transmission to slave
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+ if (spi_vars.isLast==SPI_LAST) {
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+ GPIO_SetBits(GPIOA, GPIO_Pin_4);
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+ }
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+ // SPI is not busy anymore
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+ spi_vars.busy = 0;
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+
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+ // SPI is done!
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+ if (spi_vars.callback!=NULL) {
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+ // call the callback
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+ spi_vars.callback();
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+ // kick the OS
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+ return 1;
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+ }
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+ }
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+ #else
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+ while(1);// this should never happen
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+ #endif
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+ }
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