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b51ea4ca24
Move common configuration for MSP430 based boards to `boards/common/msp430` and make use of that.
89 lines
2.1 KiB
C
89 lines
2.1 KiB
C
/*
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* Copyright (C) 2014 INRIA
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* 2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_msb430
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* @{
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*
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* @file
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* @brief MSB-430 peripheral configuration
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*
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* @author Oliver Hahm <oliver.hahm@inria.fr>
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "macros/units.h"
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#include "cfg_timer_a_smclk_b_aclk.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define CLOCK_CORECLOCK msp430_dco_freq
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/**
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* @brief Clock configuration
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*/
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static const msp430_clock_params_t clock_params = {
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.target_dco_frequency = 7372800U,
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.lfxt1_frequency = 32768,
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.main_clock_source = MAIN_CLOCK_SOURCE_DCOCLK,
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.submain_clock_source = SUBMAIN_CLOCK_SOURCE_DCOCLK,
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.main_clock_divier = MAIN_CLOCK_DIVIDE_BY_1,
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.submain_clock_divier = SUBMAIN_CLOCK_DIVIDE_BY_1,
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.auxiliary_clock_divier = AUXILIARY_CLOCK_DIVIDE_BY_1,
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.has_r_osc = true,
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};
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_BASE (&USART_1)
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#define UART_SFR (&USART_1_SFR)
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#define UART_IE_RX_BIT (1 << 4)
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#define UART_IE_TX_BIT (1 << 5)
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#define UART_ME_BITS (0x30)
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#define UART_PORT (&PORT_3)
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#define UART_RX_PIN (1 << 6)
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#define UART_TX_PIN (1 << 7)
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#define UART_RX_ISR (USART1RX_VECTOR)
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#define UART_TX_ISR (USART1TX_VECTOR)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (1U)
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/* SPI configuration */
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#define SPI_BASE (&USART_1)
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#define SPI_SFR (&USART_1_SFR)
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#define SPI_IE_RX_BIT (1 << 6)
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#define SPI_IE_TX_BIT (1 << 7)
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#define SPI_ME_BIT (1 << 6)
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#define SPI_PIN_MISO GPIO_PIN(P5, 2)
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#define SPI_PIN_MOSI GPIO_PIN(P5, 1)
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#define SPI_PIN_CLK GPIO_PIN(P5, 3)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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