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98 lines
2.9 KiB
C
98 lines
2.9 KiB
C
/*
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* Copyright (C) 2015-2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32f4
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* @{
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*
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* @file
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* @brief CPU specific definitions for internal peripheral handling
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*/
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#ifndef PERIPH_CPU_H
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#define PERIPH_CPU_H
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#include "periph_cpu_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief Starting address of the CPU ID
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*/
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#define CPUID_ADDR (0x1fff7a10)
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/**
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* @brief Available ports on the STM32F4 family
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*/
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enum {
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PORT_A = 0, /**< port A */
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PORT_B = 1, /**< port B */
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PORT_C = 2, /**< port C */
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PORT_D = 3, /**< port D */
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PORT_E = 4, /**< port E */
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PORT_F = 5, /**< port F */
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PORT_G = 6, /**< port G */
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PORT_H = 7, /**< port H */
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PORT_I = 8 /**< port I */
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};
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/**
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* @brief Available number of ADC devices
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*/
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#if defined(CPU_MODEL_STM32F401RE) || defined(CPU_MODEL_STM32F410RB) \
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|| defined(CPU_MODEL_STM32F411RE) \
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|| defined(CPU_MODEL_STM32F413CG) || defined(CPU_MODEL_STM32F413RG) \
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|| defined(CPU_MODEL_STM32F413MG) || defined(CPU_MODEL_STM32F413VG) \
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|| defined(CPU_MODEL_STM32F413ZG) || defined(CPU_MODEL_STM32F413CH) \
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|| defined(CPU_MODEL_STM32F413RH) || defined(CPU_MODEL_STM32F413MH) \
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|| defined(CPU_MODEL_STM32F413VH) || defined(CPU_MODEL_STM32F413ZH) \
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|| defined(CPU_MODEL_STM32F423CH) || defined(CPU_MODEL_STM32F423RH) \
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|| defined(CPU_MODEL_STM32F423MH) || defined(CPU_MODEL_STM32F423VH) \
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|| defined(CPU_MODEL_STM32F423ZH)
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#define ADC_DEVS (1U)
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#elif defined(CPU_MODEL_STM32F407VG) || defined(CPU_MODEL_STM32F415RG) || defined(CPU_MODEL_STM32F446RE) || defined(CPU_MODEL_STM32F429ZI)
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#define ADC_DEVS (3U)
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#endif
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#ifndef DOXYGEN
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/**
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* @brief Override the ADC resolution configuration
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* @{
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*/
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#define HAVE_ADC_RES_T
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typedef enum {
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ADC_RES_6BIT = 0x03000000, /**< ADC resolution: 6 bit */
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ADC_RES_8BIT = 0x02000000, /**< ADC resolution: 8 bit */
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ADC_RES_10BIT = 0x01000000, /**< ADC resolution: 10 bit */
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ADC_RES_12BIT = 0x00000000, /**< ADC resolution: 12 bit */
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ADC_RES_14BIT = 1, /**< ADC resolution: 14 bit (not supported) */
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ADC_RES_16BIT = 2 /**< ADC resolution: 16 bit (not supported)*/
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} adc_res_t;
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/** @} */
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#endif /* ndef DOXYGEN */
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/**
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* @brief ADC channel configuration data
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*/
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typedef struct {
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gpio_t pin; /**< pin connected to the channel */
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uint8_t dev; /**< ADCx - 1 device used for the channel */
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uint8_t chan; /**< CPU ADC channel connected to the pin */
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} adc_conf_t;
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CPU_H */
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/** @} */
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