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This is the radio found in NXP Kinetis KW41Z, KW21Z. Only 802.15.4 mode is implemented (KW41Z also supports BLE on the same transceiver). The driver uses vendor supplied initialization code for the low level XCVR hardware, these files were imported from KSDK 2.2.0 (framework_5.3.5)
194 lines
7.9 KiB
C
194 lines
7.9 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted (subject to the limitations in the
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* disclaimer below) provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
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* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __IFR_RADIO_H__
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/* clang-format off */
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#define __IFR_RADIO_H__
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/* clang-format on */
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#include <stdint.h>
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#include "fsl_xcvr.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/*!
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* @addtogroup xcvr
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* @{
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*/
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/*! @file*/
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define IFR_EOF_SYMBOL (0xFEED0E0FU) /* < Denotes the "End of File" for IFR data */
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#define IFR_VERSION_HDR (0xABCD0000U) /* < Constant value for upper 16 bits of IFR data header */
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#define IFR_VERSION_MASK (0x0000FFFFU) /* < Mask for version number (lower 16 bits) of IFR data header */
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#define IFR_SW_ID_MIN (0x00000000U) /* < Lower limit of SW trim IDs */
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#define IFR_SW_ID_MAX (0x0000FFFFU) /* < Lower limit of SW trim IDs */
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#define IS_A_SW_ID(x) ((IFR_SW_ID_MIN < (x)) && (IFR_SW_ID_MAX >= (x)))
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/* K3 valid registers support */
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#if (defined(CPU_MODEL_K32W042S1M2CAx_M0P) || defined(CPU_MODEL_K32W042S1M2VPJ_M0P))
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#define IS_VALID_REG_ADDR(x) (((x) & 0xFFFF0000U) == 0x41000000U) /* Valid addresses are 0x410xxxxx */
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#endif /* (defined(CPU_MODEL_K32W042S1M2CAx_M0P) || defined(CPU_MODEL_K32W042S1M2VPJ_M0P)) */
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/* KW41 and KW35/36 valid registers support */
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#if (defined(CPU_MODEL_MKW41Z256VHT4) || defined(CPU_MODEL_MKW41Z512VHT4) || \
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defined(CPU_MODEL_MKW31Z256VHT4) || defined(CPU_MODEL_MKW31Z512VHT4) || \
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defined(CPU_MODEL_MKW21Z256VHT4) || defined(CPU_MODEL_MKW21Z512VHT4) || \
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defined(CPU_MODEL_MKW35A512VFP4) || defined(CPU_MODEL_MKW36A512VFP4) )
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#define IS_VALID_REG_ADDR(x) (((x) & 0xFFFF0000U) == 0x40050000U) /* Valid addresses are 0x4005xxxx */
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#endif
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#define MAKE_MASK(size) ((1 << (size)) - 1)
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#define MAKE_MASKSHFT(size, bitpos) (MAKE_MASK(size) << (bitpos))
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#define IFR_TZA_CAP_TUNE_MASK (0x0000000FU)
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#define IFR_TZA_CAP_TUNE_SHIFT (0)
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#define IFR_BBF_CAP_TUNE_MASK (0x000F0000U)
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#define IFR_BBF_CAP_TUNE_SHIFT (16)
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#define IFR_RES_TUNE2_MASK (0x00F00000U)
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#define IFR_RES_TUNE2_SHIFT (20)
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/* \var typedef uint8_t IFR_ERROR_T */
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/* \brief The IFR error reporting type. */
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/* See #IFR_ERROR_T_enum for the enumeration definitions. */
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typedef uint8_t IFR_ERROR_T;
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/* \brief The enumerations used to describe IFR errors. */
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enum IFR_ERROR_T_enum
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{
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IFR_SUCCESS = 0,
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INVALID_POINTER = 1, /* < NULL pointer error */
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INVALID_DEST_SIZE_SHIFT = 2, /* < the bits won't fit as specified in the destination */
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};
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/* \var typedef uint16_t SW_TRIM_ID_T */
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/* \brief The SW trim ID type. */
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/* See #SW_TRIM_ID_T_enum for the enumeration definitions. */
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typedef uint16_t SW_TRIM_ID_T;
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/* \brief The enumerations used to define SW trim IDs. */
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enum SW_TRIM_ID_T_enum
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{
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Q_RELATIVE_GAIN_BY_PART = 0, /* < Q vs I relative gain trim ID */
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ADC_GAIN = 1, /* < ADC gain trim ID */
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ZB_FILT_TRIM = 2, /* < Baseband Bandwidth filter trim ID for BLE */
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BLE_FILT_TRIM = 3, /* < Baseband Bandwidth filter trim ID for BLE */
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TRIM_STATUS = 4, /* < Status result of the trim process (error indications) */
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TRIM_VERSION = 0xABCD, /* < Version number of the IFR trim algorithm/format. */
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};
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/* \var typedef uint32_t IFR_TRIM_STATUS_T */
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/* \brief The definition of failure bits stored in IFR trim status word. */
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/* See #IFR_TRIM_STATUS_T_enum for the enumeration definitions. */
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typedef uint32_t IFR_TRIM_STATUS_T;
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/* \brief The enumerations used to describe trim algorithm failures in the status entry in IFR. */
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/* This enum represents multiple values which can be OR'd together in a single status word. */
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enum IFR_TRIM_STATUS_T_enum
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{
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TRIM_ALGORITHM_SUCCESS = 0,
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BGAP_VOLTAGE_TRIM_FAILED = 1, /* < algorithm failure in BGAP voltagetrim */
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IQMC_GAIN_ADJ_FAILED = 2, /* < algorithm failure in IQMC gain trim */
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IQMC_PHASE_ADJ_FAILED = 4, /* < algorithm failure in IQMC phase trim */
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IQMC_DC_GAIN_ADJ_FAILED = 8, /* < IQMC DC gain trim failure */
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ADC_GAIN_TRIM_FAILED = 10, /* < Trim failure for ADC Gain Trim */
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ZB_FILT_TRIM_FAILED = 20, /* < Filter trim failure for 802.15.4 */
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BLE_FILT_TRIM_FAILED = 40, /* < Filter trim failure for BLE */
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};
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/* \var typedef struct IFR_SW_TRIM_TBL_ENTRY_T */
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/* \brief Structure defining an entry in a table used to contain values to be passed back from IFR */
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/* handling routine to XCVR driver software. */
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typedef struct
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{
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SW_TRIM_ID_T trim_id; /* < The assigned ID */
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uint32_t trim_value; /* < The value fetched from IFR.*/
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uint8_t valid; /* < validity of the trim_value field after IFR processing is complete (TRUE/FALSE).*/
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} IFR_SW_TRIM_TBL_ENTRY_T;
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/*******************************************************************************
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* API
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******************************************************************************/
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/*!
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* @brief Main IFR handler function called by XCVR driver software to process trim table.
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*
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* This function handles reading data from IFR and either loading to registers or storing to a SW trim values table.
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*
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* @param sw_trim_tbl pointer to the table used to store software trim values.
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* @param num_entries the number of entries that can be stored in the SW trim table.
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*/
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void handle_ifr(IFR_SW_TRIM_TBL_ENTRY_T * sw_trim_tbl, uint16_t num_entries);
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/*!
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* @brief Handler function to read die_id from IFR locations..
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*
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* This function handles reading die ID value for debug and testing usage.
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*
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* @return the value of the die ID field.
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*/
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uint32_t handle_ifr_die_id(void);
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/*!
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* @brief Handler function to read KW chip version from IFR locations..
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*
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* This function handles reading KW chip version for debug and testing usage.
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*
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* @return the value of the KW version field.
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*/
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uint32_t handle_ifr_die_kw_type(void);
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/*!
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* @brief Debug function to dump the IFR contents to a RAM array.
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*
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* This function handles reading data from IFR and storing to a RAM array for debug.
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*
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* @param dump_tbl pointer to the table used to store IFR entry values.
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* @param num_entries the number of entries that can be stored in the dump table.
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*/
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void dump_ifr(uint32_t * dump_tbl, uint8_t num_entries);
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#ifdef __cplusplus
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}
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#endif
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#endif /*__IFR_RADIO_H__ */
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