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https://github.com/RIOT-OS/RIOT.git
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5bd67d88a8
This is the radio found in NXP Kinetis KW41Z, KW21Z. Only 802.15.4 mode is implemented (KW41Z also supports BLE on the same transceiver). The driver uses vendor supplied initialization code for the low level XCVR hardware, these files were imported from KSDK 2.2.0 (framework_5.3.5)
536 lines
18 KiB
C
536 lines
18 KiB
C
/*
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* The Clear BSD License
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* Copyright (c) 2015, Freescale Semiconductor, Inc.
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* Copyright 2016-2017 NXP
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted (subject to the limitations in the
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* disclaimer below) provided that the following conditions are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* * Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
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* GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
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* HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "cpu.h"
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#include "fsl_xcvr.h"
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#include "ifr_radio.h"
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#include "fsl_os_abstraction.h"
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/*******************************************************************************
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* Definitions
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******************************************************************************/
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#define IFR_RAM (0)
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#if RADIO_IS_GEN_3P0
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#define RDINDX (0x41U)
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#define K3_BASE_INDEX (0x11U) /* Based for read index */
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#else
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#define RDRSRC (0x03U)
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#define KW4x_512_BASE (0x20000U)
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#define KW4x_256_BASE (0x10000U)
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#endif /* RADIO_IS_GEN_3P0 */
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#if RADIO_IS_GEN_2P1
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#define FTFA (FTFE)
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#endif /* RADIO_IS_GEN_2P1 */
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/*******************************************************************************
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* Prototypes
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******************************************************************************/
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static uint32_t read_another_ifr_word(void);
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static uint32_t read_first_ifr_word(uint32_t read_addr);
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#if RADIO_IS_GEN_3P0
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static uint64_t read_index_ifr(uint32_t read_addr);
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#else
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/*! *********************************************************************************
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* @brief Reads a location in block 1 IFR for use by the radio.
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*
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* This function handles reading IFR data from flash memory for trim loading.
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*
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* @param read_addr the address in the IFR to be read.
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*
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* @details This function wraps both the Gen2 read_resource command and the Gen2.1 and Gen3 read_index
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***********************************************************************************/
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#if RADIO_IS_GEN_2P1
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static uint64_t read_resource_ifr(uint32_t read_addr);
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#else
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static uint32_t read_resource_ifr(uint32_t read_addr);
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#endif /* RADIO_IS_GEN_2P1 */
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#endif /* RADIO_IS_GEN_3P0 */
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static void store_sw_trim(IFR_SW_TRIM_TBL_ENTRY_T * sw_trim_tbl, uint16_t num_entries, uint32_t addr, uint32_t data);
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/*******************************************************************************
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* Variables
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******************************************************************************/
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static uint32_t ifr_read_addr;
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#if RADIO_IS_GEN_3P0
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static uint64_t packed_data_long; /* Storage for 2 32 bit values to be read by read_index */
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static uint8_t num_words_avail; /* Number of 32 bit words available in packed_data_long storage */
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const uint32_t BLOCK_1_IFR[]=
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{
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/* Revised fallback table which should work with untrimmed parts */
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0xABCDFFFEU, /* Version #FFFE indicates default trim values */
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/* Trim table is empty for Gen3 by default */
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/* No TRIM_STATUS in SW fallback array. */
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0xFEED0E0FU /* End of File */
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};
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#else
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#if RADIO_IS_GEN_2P0
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const uint32_t BLOCK_1_IFR[]=
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{
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/* Revised fallback table which should work with untrimmed parts */
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0xABCDFFFEU, /* Version #FFFE indicates default trim values */
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0x4005912CU, /* RSIM_ANA_TRIM address */
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0x784B0000U, /* RSIM_ANA_TRIM default value */
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/* No TRIM_STATUS in SW fallback array. */
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0xFEED0E0FU /* End of File */
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};
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#else
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static uint64_t packed_data_long; /* Storage for 2 32 bit values to be read by read_index */
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static uint8_t num_words_avail; /* Number of 32 bit words available in packed_data_long storage */
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const uint32_t BLOCK_1_IFR[]=
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{
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/* Revised fallback table which should work with untrimmed parts */
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0xABCDFFFEU, /* Version #FFFE indicates default trim values */
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0x4005912CU, /* RSIM_ANA_TRIM address */
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0x784B0000U, /* RSIM_ANA_TRIM default value */
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/* No TRIM_STATUS in SW fallback array. */
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0xFEED0E0FU /* End of File */
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};
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#endif /* RADIO_IS_GEN_2P0 */
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#endif /* RADIO_IS_GEN_3P0 */
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/*******************************************************************************
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* Code
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******************************************************************************/
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/*! *********************************************************************************
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* \brief Read command for reading the first 32bit word from IFR, encapsulates different
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* flash IFR read mechanisms for multiple generations of SOC
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*
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* \param read_addr flash address
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*
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* \return 8 bytes of packed data containing radio trims only
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*
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***********************************************************************************/
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static uint32_t read_first_ifr_word(uint32_t read_addr)
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{
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ifr_read_addr = read_addr;
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return read_another_ifr_word();
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}
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/*! *********************************************************************************
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* \brief Read command for reading additional 32bit words from IFR. Encapsulates multiple IFR read mechanisms.
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*
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* \param read_addr flash address
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*
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* \return 8 bytes of packed data containing radio trims only
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*
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* \remarks PRE-CONDITIONS:
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* The function read_first_ifr_word() must have been called so that the ifr_read_addr variable is setup prior to use.
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*
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***********************************************************************************/
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static uint32_t read_another_ifr_word(void)
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{
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uint32_t packed_data;
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#if (RADIO_IS_GEN_3P0 || RADIO_IS_GEN_2P1)
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/* Using some static storage and alternating reads to read_index_ifr to replace read_resource_ifr */
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if (num_words_avail == 0)
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{
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#if RADIO_IS_GEN_3P0
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packed_data_long = read_index_ifr(ifr_read_addr);
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#else /* Use 64 bit return version of read_resource */
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packed_data_long = read_resource_ifr(ifr_read_addr);
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#endif /* RADIO_IS_GEN_3P0 */
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num_words_avail = 2;
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ifr_read_addr++; /* Read index addresses increment by 1 */
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}
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packed_data = (uint32_t)(packed_data_long & 0xFFFFFFFF);
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packed_data_long = packed_data_long >> 32;
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num_words_avail--;
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#else
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packed_data = read_resource_ifr(ifr_read_addr);
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ifr_read_addr += 4; /* Read resource addresses increment by 4 */
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#endif /* (RADIO_IS_GEN_3P0 || RADIO_IS_GEN_2P1) */
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return packed_data;
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}
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#if RADIO_IS_GEN_3P0
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/*! *********************************************************************************
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* \brief Read command for reading from IFR using RDINDEX command
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*
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* \param read_addr flash address
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*
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* \return 8 bytes of packed data containing radio trims only
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*
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***********************************************************************************/
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static uint64_t read_index_ifr(uint32_t read_addr)
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{
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uint8_t rdindex = read_addr;
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uint64_t read_data;
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uint8_t i;
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while ((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 to make sure not interrupting a prior operation */
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if ((FTFE->FSTAT & FTFE_FSTAT_ACCERR_MASK) == FTFE_FSTAT_ACCERR_MASK )
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{
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FTFE->FSTAT = (1 << FTFE_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */
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}
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FTFE->FCCOB[0] = RDINDX;
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FTFE->FCCOB[1] = rdindex;
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OSA_InterrupDisable();
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FTFE->FSTAT = FTFE_FSTAT_CCIF_MASK;
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while((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 */
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OSA_InterruptEnable();
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/* Pack read data back into 64 bit type */
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read_data = FTFE->FCCOB[11]; /* MSB goes in first, will be shifted left sequentially */
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for (i = 10; i > 3; i--)
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{
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read_data = read_data << 8;
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read_data |= FTFE->FCCOB[i];
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}
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return read_data;
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}
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#else
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/*! *********************************************************************************
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* \brief Read command for reading from IFR
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*
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* \param read_addr flash address
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*
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* \return packed data containing radio trims only
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*
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***********************************************************************************/
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#if RADIO_IS_GEN_2P0
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static uint32_t read_resource_ifr(uint32_t read_addr)
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{
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uint32_t packed_data;
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uint8_t flash_addr23_16, flash_addr15_8, flash_addr7_0;
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uint32_t read_data31_24, read_data23_16, read_data15_8, read_data7_0;
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flash_addr23_16 = (uint8_t)((read_addr & 0xFF0000) >> 16);
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flash_addr15_8 = (uint8_t)((read_addr & 0x00FF00) >> 8);
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flash_addr7_0 = (uint8_t)(read_addr & 0xFF);
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while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */
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if ((FTFA->FSTAT & FTFA_FSTAT_ACCERR_MASK) == FTFA_FSTAT_ACCERR_MASK )
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{
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FTFA->FSTAT = (1<<FTFA_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */
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}
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FTFA->FCCOB0 = RDRSRC;
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FTFA->FCCOB1 = flash_addr23_16;
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FTFA->FCCOB2 = flash_addr15_8;
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FTFA->FCCOB3 = flash_addr7_0;
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FTFA->FCCOB8 = 0x00;
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OSA_InterruptDisable();
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FTFA->FSTAT = FTFA_FSTAT_CCIF_MASK;
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while ((FTFA_FSTAT_CCIF_MASK & FTFA->FSTAT) == 0); /* Wait till CCIF=1 */
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OSA_InterruptEnable();
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/* Start reading */
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read_data31_24 = FTFA->FCCOB4; /* FTFA->FCCOB[4] */
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read_data23_16 = FTFA->FCCOB5; /* FTFA->FCCOB[5] */
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read_data15_8 = FTFA->FCCOB6; /* FTFA->FCCOB[6] */
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read_data7_0 = FTFA->FCCOB7; /* FTFA->FCCOB[7] */
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packed_data = (read_data31_24 << 24) | (read_data23_16 << 16) | (read_data15_8 << 8) | (read_data7_0 << 0);
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return packed_data;
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}
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#else
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static uint64_t read_resource_ifr(uint32_t read_addr)
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{
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uint64_t packed_data;
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uint8_t flash_addr23_16, flash_addr15_8, flash_addr7_0;
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uint8_t read_data[8];
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uint64_t temp_64;
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uint8_t i;
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flash_addr23_16 = (uint8_t)((read_addr & 0xFF0000) >> 16);
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flash_addr15_8 = (uint8_t)((read_addr & 0x00FF00) >> 8);
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flash_addr7_0 = (uint8_t)(read_addr & 0xFF);
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while((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 */
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if ((FTFE->FSTAT & FTFE_FSTAT_ACCERR_MASK) == FTFE_FSTAT_ACCERR_MASK )
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{
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FTFE->FSTAT = (1<<FTFE_FSTAT_ACCERR_SHIFT); /* Write 1 to ACCEER to clear errors */
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}
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FTFE->FCCOB0 = RDRSRC;
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FTFE->FCCOB1 = flash_addr23_16;
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FTFE->FCCOB2 = flash_addr15_8;
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FTFE->FCCOB3 = flash_addr7_0;
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FTFE->FCCOB4 = 0x00;
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OSA_InterruptDisable();
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FTFE->FSTAT = FTFE_FSTAT_CCIF_MASK;
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while ((FTFE_FSTAT_CCIF_MASK & FTFE->FSTAT) == 0); /* Wait till CCIF=1 */
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OSA_InterruptEnable();
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/* Start reading */
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read_data[7] = FTFE->FCCOB4;
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read_data[6] = FTFE->FCCOB5;
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read_data[5] = FTFE->FCCOB6;
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read_data[4] = FTFE->FCCOB7;
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read_data[3] = FTFE->FCCOB8;
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read_data[2] = FTFE->FCCOB9;
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read_data[1] = FTFE->FCCOBA;
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read_data[0] = FTFE->FCCOBB;
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packed_data = 0;
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for (i = 0; i < 8; i++)
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{
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temp_64 = read_data[i];
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packed_data |= temp_64 << (i * 8);
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}
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return packed_data;
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}
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#endif /* RADIO_IS_GEN_2P0 */
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#endif /* RADIO_IS_GEN_3P0 */
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/*! *********************************************************************************
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* \brief Store a SW trim value in the table passed in from calling function.
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*
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* \param sw_trim_tbl pointer to the software trim table to hold SW trim values
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* \param num_entries the number of entries in the SW trim table
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* \param addr the software trim ID
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* \param data the value of the software trim
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*
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***********************************************************************************/
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static void store_sw_trim(IFR_SW_TRIM_TBL_ENTRY_T * sw_trim_tbl, uint16_t num_entries, uint32_t addr, uint32_t data)
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{
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uint16_t i;
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if (sw_trim_tbl != NULL)
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{
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for (i = 0; i < num_entries; i++)
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{
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if (addr == sw_trim_tbl[i].trim_id)
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{
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sw_trim_tbl[i].trim_value = data;
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sw_trim_tbl[i].valid = 1;
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break; /* Don't need to scan the array any further... */
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}
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}
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}
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}
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/*! *********************************************************************************
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* \brief Process block 1 IFR data.
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*
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* \param sw_trim_tbl pointer to the software trim table to hold SW trim values
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* \param num_entries the number of entries in the SW trim table
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*
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* \remarks
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* Uses a IFR v2 formatted default array if the IFR is blank or corrupted.
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* Stores SW trim values to an array passed into this function.
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*
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***********************************************************************************/
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void handle_ifr(IFR_SW_TRIM_TBL_ENTRY_T * sw_trim_tbl, uint16_t num_entries)
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{
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uint32_t dest_addr;
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uint32_t read_addr;
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uint32_t dest_data;
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uint32_t packed_data;
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const uint32_t *ifr_ptr;
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#if RADIO_IS_GEN_3P0
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num_words_avail = 0; /* Prep for handling 64 bit words from flash */
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#endif /* RADIO_IS_GEN_3P0 */
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#if RADIO_IS_GEN_3P0
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read_addr = K3_BASE_INDEX;
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#else
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#ifdef CPU_MODEL_MKW41Z256VHT4
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read_addr = KW4x_256_BASE;
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#else
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read_addr = KW4x_512_BASE;
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#endif /* CPU_MODEL_MKW41Z256VHT4 */
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#endif /* RADIO_IS_GEN_3P0 */
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/* Read first entry in IFR table */
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packed_data = read_first_ifr_word(read_addr);
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if ((packed_data&~IFR_VERSION_MASK) == IFR_VERSION_HDR)
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{
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/* Valid header was found, process real IFR data */
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XCVR_MISC->OVERWRITE_VER = (packed_data & IFR_VERSION_MASK);
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store_sw_trim(sw_trim_tbl, num_entries, 0xABCD, (packed_data & IFR_VERSION_MASK)); /* Place IFR version # in SW trim array*/
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packed_data = read_another_ifr_word();
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while (packed_data !=IFR_EOF_SYMBOL)
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{
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if (IS_A_SW_ID(packed_data)) /* SW Trim case (non_reg writes) */
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{
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dest_addr = packed_data;
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packed_data = read_another_ifr_word();
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dest_data = packed_data;
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/* Place SW trim in array for driver SW to use */
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store_sw_trim(sw_trim_tbl, num_entries, dest_addr, dest_data);
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}
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else
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{
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if (IS_VALID_REG_ADDR(packed_data)) /* Valid register write address */
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{
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dest_addr = packed_data;
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packed_data = read_another_ifr_word();
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dest_data = packed_data;
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*(uint32_t *)(dest_addr) = dest_data;
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}
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else
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{ /* Invalid address case */
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}
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}
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packed_data=read_another_ifr_word();
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}
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}
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else
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{
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/* Valid header is not present, use blind IFR trim table */
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ifr_ptr = BLOCK_1_IFR;
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packed_data = *ifr_ptr;
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XCVR_MISC->OVERWRITE_VER = (packed_data & IFR_VERSION_MASK);
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store_sw_trim(sw_trim_tbl, num_entries, 0xABCD, (packed_data & IFR_VERSION_MASK)); /* Place IFR version # in SW trim array */
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ifr_ptr++;
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packed_data= *ifr_ptr;
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while (packed_data != IFR_EOF_SYMBOL)
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{
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if (IS_A_SW_ID(packed_data))
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{
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/* SW Trim case (non_reg writes) */
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dest_addr = packed_data;
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ifr_ptr++;
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packed_data = *(ifr_ptr);
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dest_data = packed_data;
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/* Place SW trim in array for driver SW to use */
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store_sw_trim(sw_trim_tbl, num_entries, dest_addr, dest_data);
|
|
}
|
|
else
|
|
{
|
|
dest_addr = packed_data;
|
|
ifr_ptr++;
|
|
packed_data = *ifr_ptr;
|
|
dest_data = packed_data;
|
|
|
|
/* Valid register write address */
|
|
if (IS_VALID_REG_ADDR(dest_addr))
|
|
{
|
|
*(uint32_t *)(dest_addr) = dest_data;
|
|
}
|
|
else
|
|
{
|
|
/* Invalid address case */
|
|
}
|
|
}
|
|
|
|
ifr_ptr++;
|
|
packed_data= *ifr_ptr;
|
|
}
|
|
}
|
|
}
|
|
|
|
#if RADIO_IS_GEN_3P0
|
|
|
|
#else
|
|
uint32_t handle_ifr_die_id(void)
|
|
{
|
|
uint32_t id_x, id_y;
|
|
uint32_t id;
|
|
|
|
id = read_resource_ifr(0x90);
|
|
id_x = id & 0x00FF0000;
|
|
id_y = id & 0x000000FF;
|
|
|
|
return (id_x | id_y);
|
|
}
|
|
|
|
uint32_t handle_ifr_die_kw_type(void)
|
|
{
|
|
uint32_t zb, ble;
|
|
|
|
zb = read_resource_ifr(0x80) & 0x8000;
|
|
ble= read_resource_ifr(0x88) & 0x100000;
|
|
|
|
return (zb | ble);
|
|
}
|
|
|
|
#endif /* RADIO_IS_GEN_3P0 */
|
|
|
|
/*! *********************************************************************************
|
|
* \brief Dumps block 1 IFR data to an array.
|
|
*
|
|
* \param dump_tbl pointer to the table to hold the dumped IFR values
|
|
* \param num_entries the number of entries to dump
|
|
*
|
|
* \remarks
|
|
* Starts at the first address in IFR and dumps sequential entries.
|
|
*
|
|
***********************************************************************************/
|
|
void dump_ifr(uint32_t * dump_tbl, uint8_t num_entries)
|
|
{
|
|
#if RADIO_IS_GEN_3P0
|
|
uint32_t ifr_address = 0x20000;
|
|
#else
|
|
uint32_t ifr_address = 0x20000;
|
|
#endif /* RADIO_IS_GEN_3P0 */
|
|
uint32_t * dump_ptr = dump_tbl;
|
|
uint8_t i;
|
|
|
|
*dump_ptr = read_first_ifr_word(ifr_address);
|
|
dump_ptr++;
|
|
|
|
for (i = 0; i < num_entries - 1; i++)
|
|
{
|
|
*dump_ptr = read_another_ifr_word();
|
|
dump_ptr++;
|
|
}
|
|
}
|