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88 lines
2.0 KiB
C
88 lines
2.0 KiB
C
/*
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* Copyright (C) 2018 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_esp8266
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* @{
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*
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* @file
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* @brief Implementation of the kernels irq interface
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*
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* @}
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*/
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#include <stdint.h>
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#include <stdio.h>
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#include "irq.h"
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#include "cpu.h"
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#include "common.h"
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#include "esp/common_macros.h"
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#include "esp/xtensa_ops.h"
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#include "sdk/ets.h"
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#include "xtensa/xtensa_context.h"
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/**
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* @brief Set on entry into and reset on exit from an ISR
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*/
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volatile uint32_t irq_interrupt_nesting = 0;
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/**
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* @brief Disable all maskable interrupts
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*/
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unsigned int IRAM irq_disable(void)
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{
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uint32_t _saved_interrupt_level;
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/* read and set interrupt level (RSIL) */
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__asm__ volatile ("rsil %0, " XTSTR(XCHAL_NUM_INTLEVELS+1) : "=a" (_saved_interrupt_level));
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DEBUG ("%s %02x(%02x)\n", __func__,
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(_saved_interrupt_level & 0xfffffff0) | (XCHAL_NUM_INTLEVELS+1),
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_saved_interrupt_level);
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return _saved_interrupt_level;
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}
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/**
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* @brief Enable all maskable interrupts
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*/
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unsigned int IRAM irq_enable(void)
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{
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uint32_t _saved_interrupt_level;
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/* read and set interrupt level (RSIL) */
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__asm__ volatile ("rsil %0, 0" : "=a" (_saved_interrupt_level));
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DEBUG ("%s %02x(%02x)\n", __func__,
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_saved_interrupt_level & 0xfffffff0, _saved_interrupt_level);
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return _saved_interrupt_level;
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}
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/**
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* @brief Restore the state of the IRQ flags
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*/
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void IRAM irq_restore(unsigned int state)
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{
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/* write interrupt level and sync */
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DEBUG ("%s %02x\n", __func__, state);
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__asm__ volatile ("wsr %0, ps; rsync" :: "a" (state));
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}
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/**
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* @brief See if the current context is inside an ISR
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*/
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int IRAM irq_is_in(void)
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{
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DEBUG("irq_interrupt_nesting = %d\n", irq_interrupt_nesting);
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return irq_interrupt_nesting;
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}
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