mirror of
https://github.com/RIOT-OS/RIOT.git
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265 lines
8.0 KiB
C
265 lines
8.0 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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* Copyright (C) 2015 PHYTEC Messtechnik GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup board_frdm-k64f
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* @{
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*
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* @file
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* @name Peripheral MCU configuration for the FRDM-K64F
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*
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* @author Johann Fischer <j.fischer@phytec.de>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @name Clock system configuration
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* @{
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*/
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#define KINETIS_CPU_USE_MCG 1
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#define KINETIS_MCG_USE_ERC 1
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#define KINETIS_MCG_USE_PLL 1
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#define KINETIS_MCG_DCO_RANGE (24000000U)
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#define KINETIS_MCG_ERC_OSCILLATOR 0
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#define KINETIS_MCG_ERC_FRDIV 6 /* ERC devider = 1280 */
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#define KINETIS_MCG_ERC_RANGE 2
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#define KINETIS_MCG_ERC_FREQ 50000000
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#define KINETIS_MCG_PLL_PRDIV 19 /* divide factor = 20 */
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#define KINETIS_MCG_PLL_VDIV0 0 /* multiply factor = 24 */
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#define KINETIS_MCG_PLL_FREQ 60000000
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#define CLOCK_CORECLOCK KINETIS_MCG_PLL_FREQ
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#define CLOCK_BUSCLOCK (CLOCK_CORECLOCK / 2)
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/** @} */
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/**
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* @name Timer configuration
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* @{
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*/
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#define TIMER_NUMOF (1U)
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#define TIMER_0_EN 1
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#define TIMER_1_EN 0
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#define TIMER_IRQ_PRIO 1
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#define TIMER_BASE PIT
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#define TIMER_MAX_VALUE (0xffffffff)
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#define TIMER_CLOCK CLOCK_CORECLOCK
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#define TIMER_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_PIT_MASK))
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/* Timer 0 configuration */
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#define TIMER_0_PRESCALER_CH 0
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#define TIMER_0_COUNTER_CH 1
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#define TIMER_0_ISR isr_pit1
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#define TIMER_0_IRQ_CHAN PIT1_IRQn
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/* Timer 1 configuration */
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#define TIMER_1_PRESCALER_CH 2
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#define TIMER_1_COUNTER_CH 3
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#define TIMER_1_ISR isr_pit3
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#define TIMER_1_IRQ_CHAN PIT3_IRQn
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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#define UART_NUMOF (1U)
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#define UART_0_EN 1
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#define UART_IRQ_PRIO 1
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#define UART_CLK CLOCK_CORECLOCK
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/* UART 0 device configuration */
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#define KINETIS_UART UART_Type
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#define UART_0_DEV UART0
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#define UART_0_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_UART0_MASK))
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#define UART_0_CLK UART_CLK
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#define UART_0_IRQ_CHAN UART0_RX_TX_IRQn
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#define UART_0_ISR isr_uart0_rx_tx
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/* UART 0 pin configuration */
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#define UART_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTB_MASK))
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#define UART_0_PORT PORTB
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#define UART_0_RX_PIN 16
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#define UART_0_TX_PIN 17
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#define UART_0_AF 3
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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/* dev, pin, channel */
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{ ADC0, GPIO_PIN(PORT_B, 10), 14 },
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{ ADC0, GPIO_PIN(PORT_B, 11), 15 },
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{ ADC0, GPIO_PIN(PORT_C, 11), 7 },
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{ ADC0, GPIO_PIN(PORT_C, 10), 6 },
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{ ADC0, GPIO_PIN(PORT_C, 8), 4 },
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{ ADC0, GPIO_PIN(PORT_C, 9), 5 },
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};
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#define ADC_NUMOF (sizeof(adc_config) / sizeof(adc_config[0]))
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/** @} */
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/**
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* @name PWM configuration
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* @{
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*/
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#define PWM_NUMOF (1U)
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#define PWM_0_EN 1
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#define PWM_MAX_CHANNELS 8
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#define PWM_MAX_VALUE 0xffff
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/* PWM 0 device configuration */
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#define PWM_0_DEV FTM0
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#define PWM_0_CHANNELS 4
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#define PWM_0_CLK CLOCK_CORECLOCK
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#define PWM_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_FTM0_MASK))
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#define PWM_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_FTM0_MASK))
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/* PWM 0 pin configuration */
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#define PWM_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTA_MASK | SIM_SCGC5_PORTC_MASK))
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/* Arduino Connector D3 */
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#define PWM_0_PORT_CH0 PORTA
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#define PWM_0_PIN_CH0 1
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#define PWM_0_FTMCHAN_CH0 6
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#define PWM_0_PIN_AF_CH0 3
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/* Arduino Connector D5 */
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#define PWM_0_PORT_CH1 PORTA
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#define PWM_0_PIN_CH1 2
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#define PWM_0_FTMCHAN_CH1 7
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#define PWM_0_PIN_AF_CH1 3
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/* Arduino Connector D6 */
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#define PWM_0_PORT_CH2 PORTC
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#define PWM_0_PIN_CH2 2
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#define PWM_0_FTMCHAN_CH2 1
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#define PWM_0_PIN_AF_CH2 4
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/* Arduino Connector D7 */
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#define PWM_0_PORT_CH3 PORTC
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#define PWM_0_PIN_CH3 3
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#define PWM_0_FTMCHAN_CH3 2
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#define PWM_0_PIN_AF_CH3 4
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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#define SPI_NUMOF (1U)
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#define SPI_0_EN 1
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#define SPI_IRQ_PRIO 1
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#define KINETIS_SPI_USE_HW_CS 1
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/* SPI 0 device config */
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#define SPI_0_DEV SPI0
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#define SPI_0_INDEX 0
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#define SPI_0_CTAS 0
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#define SPI_0_CLKEN() (SIM->SCGC6 |= (SIM_SCGC6_SPI0_MASK))
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#define SPI_0_CLKDIS() (SIM->SCGC6 &= ~(SIM_SCGC6_SPI0_MASK))
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#define SPI_0_IRQ SPI0_IRQn
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#define SPI_0_IRQ_HANDLER isr_spi0
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#define SPI_0_FREQ CLOCK_CORECLOCK
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/* SPI 0 pin configuration */
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#define SPI_0_PORT PORTD
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#define SPI_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTD_MASK))
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#define SPI_0_AF 2
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#define SPI_0_PCS0_PIN 0
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#define SPI_0_SCK_PIN 1
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#define SPI_0_SOUT_PIN 2
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#define SPI_0_SIN_PIN 3
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#define SPI_0_PCS0_ACTIVE_LOW 1
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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#define I2C_NUMOF (1U)
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#define I2C_CLK CLOCK_CORECLOCK
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#define I2C_0_EN 1
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#define I2C_IRQ_PRIO 1
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/* Low (10 kHz): MUL = 4, SCL divider = 2560, total: 10240 */
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#define KINETIS_I2C_F_ICR_LOW (0x3D)
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#define KINETIS_I2C_F_MULT_LOW (2)
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/* Normal (100 kHz): MUL = 2, SCL divider = 240, total: 480 */
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#define KINETIS_I2C_F_ICR_NORMAL (0x1F)
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#define KINETIS_I2C_F_MULT_NORMAL (1)
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/* Fast (400 kHz): MUL = 1, SCL divider = 128, total: 128 */
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#define KINETIS_I2C_F_ICR_FAST (0x17)
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#define KINETIS_I2C_F_MULT_FAST (0)
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/* Fast plus (1000 kHz): MUL = 1, SCL divider = 48, total: 48 */
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#define KINETIS_I2C_F_ICR_FAST_PLUS (0x10)
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#define KINETIS_I2C_F_MULT_FAST_PLUS (0)
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/* I2C 0 device configuration */
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#define I2C_0_DEV I2C0
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#define I2C_0_CLKEN() (SIM->SCGC4 |= (SIM_SCGC4_I2C0_MASK))
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#define I2C_0_CLKDIS() (SIM->SCGC4 &= ~(SIM_SCGC4_I2C0_MASK))
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#define I2C_0_IRQ I2C0_IRQn
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#define I2C_0_IRQ_HANDLER isr_i2c0
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/* I2C 0 pin configuration */
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#define I2C_0_PORT PORTE
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#define I2C_0_PORT_CLKEN() (SIM->SCGC5 |= (SIM_SCGC5_PORTE_MASK))
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#define I2C_0_PIN_AF 5
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#define I2C_0_SDA_PIN 25
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#define I2C_0_SCL_PIN 24
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#define I2C_0_PORT_CFG (PORT_PCR_MUX(I2C_0_PIN_AF) | PORT_PCR_ODE_MASK)
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/** @} */
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/**
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* @name GPIO configuration
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* @{
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*/
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#define GPIO_IRQ_PRIO CPU_DEFAULT_IRQ_PRIO
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/** @} */
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/**
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* @name RTT and RTC configuration
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* @{
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*/
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#define RTT_NUMOF (1U)
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#define RTC_NUMOF (1U)
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#define RTT_DEV RTC
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#define RTT_IRQ RTC_IRQn
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#define RTT_IRQ_PRIO 10
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#define RTT_UNLOCK() (SIM->SCGC6 |= (SIM_SCGC6_RTC_MASK))
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#define RTT_ISR isr_rtc
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#define RTT_FREQUENCY (1)
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#define RTT_MAX_VALUE (0xffffffff)
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/** @} */
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/**
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* @name Random Number Generator configuration
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* @{
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*/
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#define KINETIS_RNGA RNG
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#define HWRNG_CLKEN() (SIM->SCGC6 |= (1 << 9))
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#define HWRNG_CLKDIS() (SIM->SCGC6 &= ~(1 << 9))
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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