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c74ec1c253
cpu/mips32r2_common adds base architecture support for mips32r2 cores it can be built in it own right as a 'CPU', but is dependant on a bootloader (like u-boot) to have bootstrapped the system, this has been tested on a 'malta' FPGA system (BOARD=mips-malta) with various mips32r2 compliant cores (interAptiv, P5600, etc).
38 lines
792 B
C
38 lines
792 B
C
/*
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* Copyright 2016, Imagination Technologies Limited and/or its
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* affiliated group companies.
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_mips32r2_common
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* @{
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*
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* @file
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* @brief common periph/pm functions
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*
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* @author Neil Jones <neil.jones@imgtec.com>
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*
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* @}
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*/
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#include <mips/m32c0.h>
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#include "periph/pm.h"
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#ifndef FEATURES_PERIPH_PM
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void pm_set_lowest(void)
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{
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/* Dont wait if interrupts are not enabled - we would never return!*/
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if (mips32_get_c0(C0_STATUS) & SR_IE) {
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__asm volatile ("wait");
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}
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}
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#endif
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void pm_off(void)
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{
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/* No Generic Power off Mechanism */
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}
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