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96 lines
2.2 KiB
C
96 lines
2.2 KiB
C
/*
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* Copyright (C) 2021 Otto-von-Guericke Universität Magdeburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_rpx0xx
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* @{
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*
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* @file
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* @brief rpx0xx interrupt vector definitions
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*
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* @author Fabian Hüßler <fabian.huessler@ovgu.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "vectors_cortexm.h"
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void dummy_handler(void) {
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dummy_handler_default();
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}
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WEAK_DEFAULT void isr_timer0(void);
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WEAK_DEFAULT void isr_timer1(void);
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WEAK_DEFAULT void isr_timer2(void);
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WEAK_DEFAULT void isr_timer3(void);
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WEAK_DEFAULT void isr_pwm_wrap(void);
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WEAK_DEFAULT void isr_usbctrl(void);
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WEAK_DEFAULT void isr_xip(void);
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WEAK_DEFAULT void isr_pio00(void);
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WEAK_DEFAULT void isr_pio01(void);
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WEAK_DEFAULT void isr_pio10(void);
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WEAK_DEFAULT void isr_pio11(void);
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WEAK_DEFAULT void isr_dma0(void);
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WEAK_DEFAULT void isr_dma1(void);
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WEAK_DEFAULT void isr_io_bank0(void);
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WEAK_DEFAULT void isr_io_qspi(void);
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WEAK_DEFAULT void isr_sio_proc0(void);
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WEAK_DEFAULT void isr_sio_proc1(void);
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WEAK_DEFAULT void isr_clocks(void);
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WEAK_DEFAULT void isr_spi0(void);
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WEAK_DEFAULT void isr_spi1(void);
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WEAK_DEFAULT void isr_uart0(void);
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WEAK_DEFAULT void isr_uart1(void);
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WEAK_DEFAULT void isr_adc_fifo(void);
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WEAK_DEFAULT void isr_i2c0(void);
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WEAK_DEFAULT void isr_i2c1(void);
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WEAK_DEFAULT void isr_rtc0(void);
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WEAK_DEFAULT void isr_swi0(void);
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WEAK_DEFAULT void isr_swi1(void);
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WEAK_DEFAULT void isr_swi2(void);
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WEAK_DEFAULT void isr_swi3(void);
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WEAK_DEFAULT void isr_swi4(void);
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WEAK_DEFAULT void isr_swi5(void);
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ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
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isr_timer0,
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isr_timer1,
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isr_timer2,
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isr_timer3,
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isr_pwm_wrap,
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isr_usbctrl,
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isr_xip,
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isr_pio00,
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isr_pio01,
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isr_pio10,
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isr_pio11,
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isr_dma0,
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isr_dma1,
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isr_io_bank0,
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isr_io_qspi,
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isr_sio_proc0,
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isr_sio_proc1,
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isr_clocks,
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isr_spi0,
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isr_spi1,
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isr_uart0,
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isr_uart1,
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isr_adc_fifo,
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isr_i2c0,
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isr_i2c1,
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isr_rtc0,
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isr_swi0,
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isr_swi1,
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isr_swi2,
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isr_swi3,
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isr_swi4,
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isr_swi5,
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};
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