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RIOT/cpu/msp430/periph/flashpage.c
2024-04-04 17:57:19 +02:00

100 lines
2.3 KiB
C

/*
* Copyright (C) 2014 INRIA
* 2017 Freie Universität Berlin
*
* This file is subject to the terms and conditions of the GNU Lesser
* General Public License v2.1. See the file LICENSE in the top level
* directory for more details.
*/
/**
* @ingroup cpu_msp430
* @{
*
* @file
* @brief Implementation of the peripheral flashpage interface
*
* @author Oliver Hahm <oliver.hahm@inria.fr>
* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
*
* @}
*/
#include <assert.h>
#include "cpu.h"
#include "irq.h"
#include "periph/flashpage.h"
static inline int _unlock(void)
{
int state;
state = irq_disable();
FCTL3 = FWKEY;
while (FCTL3 & BUSY) {}
return state;
}
static inline void _lock(int state)
{
FCTL3 = (FWKEY | LOCK);
irq_restore(state);
}
static inline void _erase(uint16_t *page_addr)
{
/* disable interrupts and unlock flash */
int state = _unlock();
/* erase page */
FCTL1 = (FWKEY | ERASE);
*page_addr = 0;
while (FCTL3 & BUSY) {}
/* lock flash and re-enable interrupts */
_lock(state);
}
void flashpage_erase(unsigned page)
{
assert((unsigned) page < FLASHPAGE_NUMOF);
uint16_t *page_addr = (uint16_t *)flashpage_addr(page);
/* erase page */
_erase(page_addr);
}
void flashpage_write(void *target_addr, const void *data, size_t len)
{
/* assert multiples of FLASHPAGE_WRITE_BLOCK_SIZE are written and no less of
that length. */
assert(!(len % FLASHPAGE_WRITE_BLOCK_SIZE));
/* ensure writes are aligned */
assert(!(((unsigned)target_addr % FLASHPAGE_WRITE_BLOCK_ALIGNMENT) ||
((unsigned)data % FLASHPAGE_WRITE_BLOCK_ALIGNMENT)));
/* ensure the length doesn't exceed the actual flash size */
assert(((unsigned)target_addr + len) <
(CPU_FLASH_BASE + (FLASHPAGE_SIZE * FLASHPAGE_NUMOF) - 1));
uint8_t *page_addr = target_addr;
const uint8_t *data_addr = data;
/* disable interrupts and unlock flash */
int state = _unlock();
/* enable write access, and write*/
FCTL1 = (FWKEY | WRT);
for (unsigned i = 0; i < len; i++) {
*(page_addr++) = *(data_addr++);
while (!(FCTL3 & WAIT)) {}
}
/* disable write access */
FCTL1 = (FWKEY);
/* lock flash and re-enable interrupts */
_lock(state);
}