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198 lines
9.7 KiB
C
198 lines
9.7 KiB
C
/******************************************************************************
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* Filename: hw_ddi.h
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* Revised: 2017-06-05 12:13:49 +0200 (Mon, 05 Jun 2017)
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* Revision: 49096
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#ifndef __HW_DDI_H__
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#define __HW_DDI_H__
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//*****************************************************************************
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//
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// This file contains macros for controlling the DDI master and
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// accessing DDI Slave registers via the DDI Master.
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// There are 3 categories of macros in this file:
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// - macros that provide an offset to a register
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// located within the DDI Master itself.
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// - macros that define bits or bitfields
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// within the DDI Master Registers.
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// - macros that provide an "instruction offset"
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// that are used when accessing a DDI Slave.
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//
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// The macros that that provide DDI Master register offsets and
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// define bits and bitfields for those registers are the typical
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// macros that appear in most hw_<module>.h header files. In
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// the following example DDI_O_CFG is a macro for a
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// register offset and DDI_CFG_WAITFORACK is a macro for
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// a bit in that register. This example code will set the WAITFORACK
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// bit in register DDI_O_CFG of the DDI Master. (Note: this
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// access the Master not the Slave).
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//
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// HWREG(AUX_OSCDDI_BASE + DDI_O_CFG) |= DDI_CFG_WAITFORACK;
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//
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//
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// The "instruction offset" macros are used to pass an instruction to
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// the DDI Master when accessing DDI slave registers. These macros are
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// only used when accessing DDI Slave Registers. (Remember DDI
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// Master Registers are accessed normally).
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//
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// The instructions supported when accessing a DDI Slave Regsiter follow:
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// - Direct Access to a DDI Slave register. I.e. read or
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// write the register.
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// - Set the specified bits in a DDI Slave register.
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// - Clear the specified bits in a DDI Slave register.
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// - Mask write of 4 bits to the a DDI Slave register.
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// - Mask write of 8 bits to the a DDI Slave register.
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// - Mask write of 16 bits to the a DDI Slave register.
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//
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// Note: only the "Direct Access" offset should be used when reading
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// a DDI Slave register. Only 8- and 16-bit reads are supported.
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//
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// The generic format of using this marcos for a read follows:
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// // read low 16-bits in DDI_SLAVE_OFF
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// myushortvar = HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR);
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//
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// // read high 16-bits in DDI_SLAVE_OFF
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// // add 2 for data[31:16]
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// myushortvar = HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + 2 + DDI_O_DIR);
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// // read data[31:24] byte in DDI_SLAVE_OFF
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// // add 3 for data[31:24]
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// myuchar = HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + 3 + DDI_O_DIR);
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//
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// Notes: In the above example:
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// - DDI_MASTER_BASE is the base address of the DDI Master defined
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// in the hw_memmap.h header file.
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// - DDI_SLAVE_OFF is the DDI Slave offset defined in the
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// hw_<ddi_slave>.h header file (e.g. hw_osc_top.h for the oscsc
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// oscillator modules.
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// - DDI_O_DIR is the "instruction offset" macro defined in this
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// file that specifies the Direct Access instruction.
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//
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// Writes can use any of the "instruction macros".
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// The following examples do a "direct write" to DDI Slave register
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// DDI_SLAVE_OFF using different size operands:
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//
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// // ---------- DIRECT WRITES ----------
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// // Write 32-bits aligned
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// HWREG(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR) = 0x12345678;
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// // Write 16-bits aligned to high 16-bits then low 16-bits
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// // Add 2 to get to high 16-bits.
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// HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR + 2) = 0xabcd;
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// HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR) = 0xef01;
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//
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// // Write each byte at DDI_SLAVE_OFF, one at a time.
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// // Add 1,2,or 3 to get to bytes 1,2, or 3.
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR) = 0x33;
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR + 1) = 0x44;
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR + 2) = 0x55;
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_DIR + 3) = 0x66;
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//
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// // ---------- SET/CLR ----------
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// The set and clear functions behave similarly to eachother. Each
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// can be performed on an 8-, 16-, or 32-bit operand.
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// Examples follow:
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// // Set all odd bits in a 32-bit words
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// HWREG(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_SET) = 0xaaaaaaaa;
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//
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// // Clear all bits in byte 2 (data[23:16]) using 32-bit operand
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// HWREG(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_CLR) = 0x00ff0000;
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//
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// // Set even bits in byte 2 (data[23:16]) using 8-bit operand
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + 2 + DDI_O_CLR) = 0x55;
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//
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// // ---------- MASKED WRITES ----------
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// The mask writes are a bit different. They operate on nibbles,
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// bytes, and 16-bit elements. Two operands are required; a 'mask'
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// and 'data'; The operands are concatenated and written to the master.
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// e.g. the mask and data are combined as follows for a 16 bit masked
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// write:
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// (mask << 16) | data;
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// Examples follow:
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//
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// // Write 5555 to low 16-bits of DDI_SLAVE_OFF register
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// // a long write is needed (32-bits).
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// HWREG(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B) = 0xffff5555;
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// // Write 1AA to data bits 24:16 in high 16-bits of DDI_SLAVE_OFF register
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// // Note add 4 for high 16-bits at DDI_SLAVE_OFF; mask is 1ff!
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// HWREG(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B + 4) = 0x01ff01aa;
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//
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// // Do an 8 bit masked write of 00 to low byte of register (data[7:0]).
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// // a short write is needed (16-bits).
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// HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B) = 0xff00;
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//
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// // Do an 8 bit masked write of 11 to byte 1 of register (data[15:8]).
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// // add 2 to get to byte 1.
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// HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B + 2) = 0xff11;
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//
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// // Do an 8 bit masked write of 33 to high byte of register (data[31:24]).
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// // add 6 to get to byte 3.
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// HWREGH(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B + 6) = 0xff33;
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//
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// // Do an 4 bit masked write (Nibble) of 7 to data[3:0]).
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// // Byte write is needed.
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B) = 0xf7;
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//
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// // Do an 4 bit masked write of 4 to data[7:4]).
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// // Add 1 for next nibble
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// HWREGB(DDI_MASTER_BASE + DDI_SLAVE_OFF + DDI_O_MASK16B + 1) = 0xf4;
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//
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//*****************************************************************************
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//*****************************************************************************
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//
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// The following are defines for the DDI master instruction offsets.
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//
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//*****************************************************************************
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#define DDI_O_DIR 0x00000000 // Offset for the direct access instruction
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#define DDI_O_SET 0x00000040 // Offset for 'Set' instruction.
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#define DDI_O_CLR 0x00000080 // Offset for 'Clear' instruction.
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#define DDI_O_MASK4B 0x00000100 // Offset for 4-bit masked access.
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// Data bit[n] is written if mask bit[n] is set ('1').
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// Bits 7:4 are mask. Bits 3:0 are data.
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// Requires 'byte' write.
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#define DDI_O_MASK8B 0x00000180 // Offset for 8-bit masked access.
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// Data bit[n] is written if mask bit[n] is set ('1').
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// Bits 15:8 are mask. Bits 7:0 are data.
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// Requires 'short' write.
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#define DDI_O_MASK16B 0x00000200 // Offset for 16-bit masked access.
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// Data bit[n] is written if mask bit[n] is set ('1').
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// Bits 31:16 are mask. Bits 15:0 are data.
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// Requires 'long' write.
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#endif // __HW_DDI_H__
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