mirror of
https://github.com/RIOT-OS/RIOT.git
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7db791476e
Signed-off-by: Jean Pierre Dudey <me@jeandudey.tech>
470 lines
19 KiB
C
470 lines
19 KiB
C
/******************************************************************************
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* Filename: osc.c
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* Revised: 2019-02-14 09:35:31 +0100 (Thu, 14 Feb 2019)
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* Revision: 54539
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*
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* Description: Driver for setting up the system Oscillators
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*
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* Copyright (c) 2015 - 2017, Texas Instruments Incorporated
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1) Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2) Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3) Neither the name of the ORGANIZATION nor the names of its contributors may
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* be used to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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******************************************************************************/
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#include "../inc/hw_types.h"
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#include "../inc/hw_ccfg.h"
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#include "../inc/hw_fcfg1.h"
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#include "aon_batmon.h"
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#include "aon_rtc.h"
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#include "osc.h"
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#include "setup_rom.h"
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#include "cpu.h"
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//*****************************************************************************
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//
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// Handle support for DriverLib in ROM:
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// This section will undo prototype renaming made in the header file
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//
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//*****************************************************************************
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#if !defined(DOXYGEN)
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#undef OSCClockSourceSet
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#define OSCClockSourceSet NOROM_OSCClockSourceSet
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#undef OSCClockSourceGet
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#define OSCClockSourceGet NOROM_OSCClockSourceGet
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#undef OSCHF_GetStartupTime
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#define OSCHF_GetStartupTime NOROM_OSCHF_GetStartupTime
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#undef OSCHF_TurnOnXosc
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#define OSCHF_TurnOnXosc NOROM_OSCHF_TurnOnXosc
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#undef OSCHF_AttemptToSwitchToXosc
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#define OSCHF_AttemptToSwitchToXosc NOROM_OSCHF_AttemptToSwitchToXosc
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#undef OSCHF_SwitchToRcOscTurnOffXosc
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#define OSCHF_SwitchToRcOscTurnOffXosc NOROM_OSCHF_SwitchToRcOscTurnOffXosc
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#undef OSCHF_DebugGetCrystalAmplitude
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#define OSCHF_DebugGetCrystalAmplitude NOROM_OSCHF_DebugGetCrystalAmplitude
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#undef OSCHF_DebugGetExpectedAverageCrystalAmplitude
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#define OSCHF_DebugGetExpectedAverageCrystalAmplitude NOROM_OSCHF_DebugGetExpectedAverageCrystalAmplitude
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#undef OSC_HPOSCRelativeFrequencyOffsetGet
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#define OSC_HPOSCRelativeFrequencyOffsetGet NOROM_OSC_HPOSCRelativeFrequencyOffsetGet
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#undef OSC_AdjustXoscHfCapArray
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#define OSC_AdjustXoscHfCapArray NOROM_OSC_AdjustXoscHfCapArray
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#undef OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert
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#define OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert NOROM_OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert
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#endif
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//*****************************************************************************
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//
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// OSCHF switch time calculator defines and globals
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//
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//*****************************************************************************
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#define RTC_CV_TO_MS(x) (( 1000 * ( x )) >> 16 )
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#define RTC_CV_TO_US(x) (( 1000000 * ( x )) >> 16 )
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typedef struct {
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uint32_t previousStartupTimeInUs ;
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uint32_t timeXoscOff_CV ;
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uint32_t timeXoscOn_CV ;
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uint32_t timeXoscStable_CV ;
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int32_t tempXoscOff ;
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} OscHfGlobals_t;
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static OscHfGlobals_t oscHfGlobals;
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//*****************************************************************************
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//
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// Configure the oscillator input to the a source clock.
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//
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//*****************************************************************************
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void
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OSCClockSourceSet(uint32_t ui32SrcClk, uint32_t ui32Osc)
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{
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// Check the arguments.
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ASSERT((ui32SrcClk & OSC_SRC_CLK_LF) ||
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(ui32SrcClk & OSC_SRC_CLK_MF) ||
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(ui32SrcClk & OSC_SRC_CLK_HF));
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ASSERT((ui32Osc == OSC_RCOSC_HF) ||
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(ui32Osc == OSC_RCOSC_LF) ||
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(ui32Osc == OSC_XOSC_HF) ||
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(ui32Osc == OSC_XOSC_LF));
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// Request the high frequency source clock (using 24 MHz XTAL)
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if(ui32SrcClk & OSC_SRC_CLK_HF)
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{
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// Enable the HF XTAL as HF clock source
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DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
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DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_M,
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DDI_0_OSC_CTL0_SCLK_HF_SRC_SEL_S,
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ui32Osc);
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}
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// Configure the medium frequency source clock
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if(ui32SrcClk & OSC_SRC_CLK_MF)
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{
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DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
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DDI_0_OSC_CTL0_SCLK_MF_SRC_SEL_M,
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DDI_0_OSC_CTL0_SCLK_MF_SRC_SEL_S,
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ui32Osc);
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}
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// Configure the low frequency source clock.
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if(ui32SrcClk & OSC_SRC_CLK_LF)
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{
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// Change the clock source.
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DDI16BitfieldWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_CTL0,
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DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_M,
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DDI_0_OSC_CTL0_SCLK_LF_SRC_SEL_S,
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ui32Osc);
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}
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}
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//*****************************************************************************
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//
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// Get the source clock settings
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//
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//*****************************************************************************
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uint32_t
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OSCClockSourceGet(uint32_t ui32SrcClk)
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{
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uint32_t ui32ClockSource;
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// Check the arguments.
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ASSERT((ui32SrcClk & OSC_SRC_CLK_LF) ||
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(ui32SrcClk & OSC_SRC_CLK_HF));
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// Return the source for the selected clock.
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if(ui32SrcClk == OSC_SRC_CLK_LF)
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{
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ui32ClockSource = DDI16BitfieldRead(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_STAT0,
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DDI_0_OSC_STAT0_SCLK_LF_SRC_M,
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DDI_0_OSC_STAT0_SCLK_LF_SRC_S);
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}
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else
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{
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ui32ClockSource = DDI16BitfieldRead(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_STAT0,
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DDI_0_OSC_STAT0_SCLK_HF_SRC_M,
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DDI_0_OSC_STAT0_SCLK_HF_SRC_S);
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}
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return (ui32ClockSource);
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}
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//*****************************************************************************
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//
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// Returns maximum startup time (in microseconds) of XOSC_HF
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//
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//*****************************************************************************
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uint32_t
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OSCHF_GetStartupTime( uint32_t timeUntilWakeupInMs )
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{
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uint32_t deltaTimeSinceXoscOnInMs ;
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int32_t deltaTempSinceXoscOn ;
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uint32_t newStartupTimeInUs ;
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deltaTimeSinceXoscOnInMs = RTC_CV_TO_MS( AONRTCCurrentCompareValueGet() - oscHfGlobals.timeXoscOn_CV );
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deltaTempSinceXoscOn = AONBatMonTemperatureGetDegC() - oscHfGlobals.tempXoscOff;
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if ( deltaTempSinceXoscOn < 0 ) {
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deltaTempSinceXoscOn = -deltaTempSinceXoscOn;
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}
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if ( (( timeUntilWakeupInMs + deltaTimeSinceXoscOnInMs ) > 3000 ) ||
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( deltaTempSinceXoscOn > 5 ) ||
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( oscHfGlobals.timeXoscStable_CV < oscHfGlobals.timeXoscOn_CV ) ||
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( oscHfGlobals.previousStartupTimeInUs == 0 ) )
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{
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newStartupTimeInUs = 2000;
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if (( HWREG( CCFG_BASE + CCFG_O_SIZE_AND_DIS_FLAGS ) & CCFG_SIZE_AND_DIS_FLAGS_DIS_XOSC_OVR_M ) == 0 ) {
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newStartupTimeInUs = (( HWREG( CCFG_BASE + CCFG_O_MODE_CONF_1 ) &
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CCFG_MODE_CONF_1_XOSC_MAX_START_M ) >>
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CCFG_MODE_CONF_1_XOSC_MAX_START_S ) * 125;
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// Note: CCFG startup time is "in units of 100us" adding 25% margin results in *125
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}
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} else {
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newStartupTimeInUs = RTC_CV_TO_US( oscHfGlobals.timeXoscStable_CV - oscHfGlobals.timeXoscOn_CV );
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newStartupTimeInUs += ( newStartupTimeInUs >> 2 ); // Add 25 percent margin
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if ( newStartupTimeInUs < oscHfGlobals.previousStartupTimeInUs ) {
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newStartupTimeInUs = oscHfGlobals.previousStartupTimeInUs;
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}
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}
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if ( newStartupTimeInUs < 200 ) {
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newStartupTimeInUs = 200;
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}
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if ( newStartupTimeInUs > 4000 ) {
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newStartupTimeInUs = 4000;
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}
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return ( newStartupTimeInUs );
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}
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//*****************************************************************************
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//
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// Turns on XOSC_HF (but without switching to XOSC_HF)
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//
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//*****************************************************************************
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void
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OSCHF_TurnOnXosc( void )
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{
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#if ( defined( ROM_OSCClockSourceSet ))
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ROM_OSCClockSourceSet( OSC_SRC_CLK_HF | OSC_SRC_CLK_MF, OSC_XOSC_HF );
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#else
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OSCClockSourceSet( OSC_SRC_CLK_HF | OSC_SRC_CLK_MF, OSC_XOSC_HF );
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#endif
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oscHfGlobals.timeXoscOn_CV = AONRTCCurrentCompareValueGet();
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}
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//*****************************************************************************
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//
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// Switch to XOSC_HF if XOSC_HF is ready.
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//
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//*****************************************************************************
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bool
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OSCHF_AttemptToSwitchToXosc( void )
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{
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uint32_t startupTimeInUs;
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uint32_t prevLimmit25InUs;
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#if ( defined( ROM_OSCClockSourceGet ))
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if ( ROM_OSCClockSourceGet( OSC_SRC_CLK_HF ) == OSC_XOSC_HF )
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#else
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if ( OSCClockSourceGet( OSC_SRC_CLK_HF ) == OSC_XOSC_HF )
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#endif
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{
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// Already on XOSC - nothing to do
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return ( 1 );
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}
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if ( OSCHfSourceReady()) {
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OSCHfSourceSwitch();
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// Store startup time, but limit to 25 percent reduction each time.
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oscHfGlobals.timeXoscStable_CV = AONRTCCurrentCompareValueGet();
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startupTimeInUs = RTC_CV_TO_US( oscHfGlobals.timeXoscStable_CV - oscHfGlobals.timeXoscOn_CV );
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prevLimmit25InUs = oscHfGlobals.previousStartupTimeInUs;
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prevLimmit25InUs -= ( prevLimmit25InUs >> 2 ); // 25 percent margin
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oscHfGlobals.previousStartupTimeInUs = startupTimeInUs;
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if ( prevLimmit25InUs > startupTimeInUs ) {
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oscHfGlobals.previousStartupTimeInUs = prevLimmit25InUs;
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}
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return ( 1 );
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}
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return ( 0 );
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}
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//*****************************************************************************
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//
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// Switch to RCOSC_HF and turn off XOSC_HF
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//
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//*****************************************************************************
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void
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OSCHF_SwitchToRcOscTurnOffXosc( void )
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{
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// Set SCLK_HF and SCLK_MF to RCOSC_HF without checking
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// Doing this anyway to keep HF and MF in sync
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#if ( defined( ROM_OSCClockSourceSet ))
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ROM_OSCClockSourceSet( OSC_SRC_CLK_HF | OSC_SRC_CLK_MF, OSC_RCOSC_HF );
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#else
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OSCClockSourceSet( OSC_SRC_CLK_HF | OSC_SRC_CLK_MF, OSC_RCOSC_HF );
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#endif
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// Do the switching if not already running on RCOSC_HF
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#if ( defined( ROM_OSCClockSourceGet ))
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if ( ROM_OSCClockSourceGet( OSC_SRC_CLK_HF ) != OSC_RCOSC_HF )
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#else
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if ( OSCClockSourceGet( OSC_SRC_CLK_HF ) != OSC_RCOSC_HF )
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#endif
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{
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OSCHfSourceSwitch();
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}
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oscHfGlobals.timeXoscOff_CV = AONRTCCurrentCompareValueGet();
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oscHfGlobals.tempXoscOff = AONBatMonTemperatureGetDegC();
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}
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//*****************************************************************************
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//
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// Adjust the XOSC HF cap array relative to the factory setting
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//
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//*****************************************************************************
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void
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OSC_AdjustXoscHfCapArray( int32_t capArrDelta )
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{
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// read the MODE_CONF register in CCFG
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uint32_t ccfg_ModeConfReg = HWREG( CCFG_BASE + CCFG_O_MODE_CONF );
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// Clear CAP_MODE and the CAPARRAY_DELATA field
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ccfg_ModeConfReg &= ~( CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M | CCFG_MODE_CONF_XOSC_CAP_MOD_M );
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// Insert new delta value
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ccfg_ModeConfReg |= ((((uint32_t)capArrDelta) << CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_S ) & CCFG_MODE_CONF_XOSC_CAPARRAY_DELTA_M );
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// Update the HW register with the new delta value
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DDI32RegWrite(AUX_DDI0_OSC_BASE, DDI_0_OSC_O_ANABYPASSVAL1, SetupGetTrimForAnabypassValue1( ccfg_ModeConfReg ));
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}
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//*****************************************************************************
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//
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// Calculate the temperature dependent relative frequency offset of HPOSC
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//
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//*****************************************************************************
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int32_t
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OSC_HPOSCRelativeFrequencyOffsetGet( int32_t tempDegC )
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{
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// Estimate HPOSC frequency, using temperature and curve fitting parameters
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uint32_t fitParams = HWREG( FCFG1_BASE + FCFG1_O_FREQ_OFFSET );
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// Extract the P0,P1,P2 params, and sign extend them via shifting up/down
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int32_t paramP0 = (((int32_t)( fitParams << ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P0_W - FCFG1_FREQ_OFFSET_HPOSC_COMP_P0_S )))
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>> ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P0_W ));
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int32_t paramP1 = (((int32_t)( fitParams << ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P1_W - FCFG1_FREQ_OFFSET_HPOSC_COMP_P1_S )))
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>> ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P1_W ));
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int32_t paramP2 = (((int32_t)( fitParams << ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P2_W - FCFG1_FREQ_OFFSET_HPOSC_COMP_P2_S )))
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>> ( 32 - FCFG1_FREQ_OFFSET_HPOSC_COMP_P2_W ));
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uint32_t fitParP3 = HWREG( FCFG1_BASE + FCFG1_O_MISC_CONF_2 );
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// Extract the P3 param, and sign extend via shifting up/down
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int32_t paramP3 = (((int32_t)( fitParP3 << ( 32 - FCFG1_MISC_CONF_2_HPOSC_COMP_P3_W - FCFG1_MISC_CONF_2_HPOSC_COMP_P3_S )))
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>> ( 32 - FCFG1_MISC_CONF_2_HPOSC_COMP_P3_W ));
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// Now we can find the HPOSC freq offset, given as a signed variable d, expressed by:
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//
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// F_HPOSC = F_nom * (1 + d/(2^22)) , where: F_HPOSC = HPOSC frequency
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// F_nom = nominal clock source frequency (e.g. 48.000 MHz)
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// d = describes relative freq offset
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// We can estimate the d variable, using temperature compensation parameters:
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//
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// d = P0 + P1*(t - T0) + P2*(t - T0)^2 + P3*(t - T0)^3, where: P0,P1,P2,P3 are curve fitting parameters from FCFG1
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// t = current temperature (from temp sensor) in deg C
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// T0 = 27 deg C (fixed temperature constant)
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int32_t tempDelta = (tempDegC - 27);
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int32_t tempDeltaX2 = tempDelta * tempDelta;
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int32_t d = paramP0 + ((tempDelta*paramP1)>>3) + ((tempDeltaX2*paramP2)>>10) + ((tempDeltaX2*tempDelta*paramP3)>>18);
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return ( d );
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}
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//*****************************************************************************
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//
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// Converts the relative frequency offset of HPOSC to the RF Core parameter format.
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//
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//*****************************************************************************
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int16_t
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OSC_HPOSCRelativeFrequencyOffsetToRFCoreFormatConvert( int32_t HPOSC_RelFreqOffset )
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{
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// The input argument, hereby referred to simply as "d", describes the frequency offset
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// of the HPOSC relative to the nominal frequency in this way:
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//
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// F_HPOSC = F_nom * (1 + d/(2^22))
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//
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// But for use by the radio, to compensate the frequency error, we need to find the
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// frequency offset "rfcFreqOffset" defined in the following format:
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//
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// F_nom = F_HPOSC * (1 + rfCoreFreqOffset/(2^22))
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//
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// To derive "rfCoreFreqOffset" from "d" we combine the two above equations and get:
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//
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// (1 + rfCoreFreqOffset/(2^22)) = (1 + d/(2^22))^-1
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//
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// Which can be rewritten into:
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//
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// rfCoreFreqOffset = -d*(2^22) / ((2^22) + d)
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//
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// = -d * [ 1 / (1 + d/(2^22)) ]
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//
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// To avoid doing a 64-bit division due to the (1 + d/(2^22))^-1 expression,
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// we can use Taylor series (Maclaurin series) to approximate it:
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//
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// 1 / (1 - x) ~= 1 + x + x^2 + x^3 + x^4 + ... etc (Maclaurin series)
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//
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// In our case, we have x = - d/(2^22), and we only include up to the first
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// order term of the series, as the second order term ((d^2)/(2^44)) is very small:
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//
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// freqError ~= -d + d^2/(2^22) (+ small approximation error)
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//
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// The approximation error is negligible for our use.
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int32_t rfCoreFreqOffset = -HPOSC_RelFreqOffset + (( HPOSC_RelFreqOffset * HPOSC_RelFreqOffset ) >> 22 );
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return ( rfCoreFreqOffset );
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}
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//*****************************************************************************
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//
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// Get crystal amplitude (assuming crystal is running).
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//
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//*****************************************************************************
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uint32_t
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OSCHF_DebugGetCrystalAmplitude( void )
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{
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uint32_t oscCfgRegCopy ;
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uint32_t startTime ;
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uint32_t deltaTime ;
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uint32_t ampValue ;
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// The specified method is as follows:
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// 1. Set minimum interval between oscillator amplitude calibrations.
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// (Done by setting PER_M=0 and PER_E=1)
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// 2. Wait approximately 4 milliseconds in order to measure over a
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// moderately large number of calibrations.
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// 3. Read out the crystal amplitude value from the peek detector.
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// 4. Restore original oscillator amplitude calibrations interval.
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// 5. Return crystal amplitude value converted to millivolt.
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oscCfgRegCopy = HWREG( AON_WUC_BASE + AON_WUC_O_OSCCFG );
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HWREG( AON_WUC_BASE + AON_WUC_O_OSCCFG ) = ( 1 << AON_WUC_OSCCFG_PER_E_S );
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startTime = AONRTCCurrentCompareValueGet();
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do {
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deltaTime = AONRTCCurrentCompareValueGet() - startTime;
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} while ( deltaTime < ((uint32_t)( 0.004 * FACTOR_SEC_TO_COMP_VAL_FORMAT )));
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ampValue = ( HWREG( AUX_DDI0_OSC_BASE + DDI_0_OSC_O_STAT1 ) &
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DDI_0_OSC_STAT1_HPM_UPDATE_AMP_M ) >>
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DDI_0_OSC_STAT1_HPM_UPDATE_AMP_S ;
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HWREG( AON_WUC_BASE + AON_WUC_O_OSCCFG ) = oscCfgRegCopy;
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return ( ampValue * 15 );
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}
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//*****************************************************************************
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//
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// Get the expected average crystal amplitude.
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//
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//*****************************************************************************
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uint32_t
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OSCHF_DebugGetExpectedAverageCrystalAmplitude( void )
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{
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uint32_t ampCompTh1 ;
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uint32_t highThreshold ;
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uint32_t lowThreshold ;
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ampCompTh1 = HWREG( AUX_DDI0_OSC_BASE + DDI_0_OSC_O_AMPCOMPTH1 );
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highThreshold = ( ampCompTh1 & DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_HTH_M ) >>
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DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_HTH_S ;
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lowThreshold = ( ampCompTh1 & DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_LTH_M ) >>
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DDI_0_OSC_AMPCOMPTH1_HPMRAMP3_LTH_S ;
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return ((( highThreshold + lowThreshold ) * 15 ) >> 1 );
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}
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