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https://github.com/RIOT-OS/RIOT.git
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110 lines
2.8 KiB
C
110 lines
2.8 KiB
C
/*
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* Copyright (C) 2019 Gunar Schorcht
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_esp32_heltec-lora32-v2
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* @brief Board specific definitions for Heltec WiFi LoRa 32 V2 board
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* @{
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*
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* Heltec WiFi LoRa 32 V2 is an ESP32 development board with 8 MB Flash that
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* uses the EPS32 chip directly. It integrates a SemTech SX1276 or SX1278 for
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* LoRaWAN communication in the 433 MHz or the 868/915 MHz band, respectively.
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* Additionally, it has an OLED display connected via I2C on board.
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*
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* For detailed information about the configuration of ESP32 boards, see
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* section \ref esp32_peripherals "Common Peripherals".
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*
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* @note
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* Most definitions can be overridden by an \ref esp32_application_specific_configurations
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* "application-specific board configuration".
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*
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* @file
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef BOARD_H
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#define BOARD_H
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#include <stdint.h>
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/**
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* @name Button pin definitions
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* @{
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*/
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/**
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* @brief Default button GPIO pin definition
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*
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* Generic ESP32 boards have a BOOT button connected to GPIO0, which can be
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* used as button during normal operation. Since the GPIO0 pin is pulled up,
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* the button signal is inverted, i.e., pressing the button will give a
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* low signal.
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*/
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#define BTN0_PIN GPIO0
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/**
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* @brief Default button GPIO mode definition
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*
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* Since the GPIO of the button is pulled up with an external resistor, the
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* mode for the GPIO pin has to be GPIO_IN.
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*/
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#define BTN0_MODE GPIO_IN
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/**
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* @brief Default interrupt flank definition for the button GPIO
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*/
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#ifndef BTN0_INT_FLANK
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#define BTN0_INT_FLANK GPIO_FALLING
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#endif
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/**
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* @brief Definition for compatibility with previous versions
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*/
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#define BUTTON0_PIN BTN0_PIN
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/** @} */
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/**
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* @name LED (on-board) configuration
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*
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* @{
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*/
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#define LED0_PIN GPIO25
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#define LED0_ACTIVE (1) /**< LED is high active */
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/** @} */
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/**
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* @name SX127X
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*
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* SX127X configuration.
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* @{
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*/
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#define SX127X_PARAM_SPI (SPI_DEV(0))
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#define SX127X_PARAM_SPI_NSS GPIO18
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#define SX127X_PARAM_RESET GPIO14
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#define SX127X_PARAM_DIO0 GPIO26
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#define SX127X_PARAM_DIO1 GPIO_UNDEF /* GPIO35 has no pulldown, leads to init error */
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#define SX127X_PARAM_DIO2 GPIO_UNDEF /* GPIO34 has no pulldown, leads to init error */
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#define SX127X_PARAM_DIO3 GPIO_UNDEF
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#define SX127X_PARAM_DIO_MULTI GPIO_UNDEF
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/** @} */
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/* include common board definitions as last step */
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#include "board_common.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifdef __cplusplus
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} /* end extern "C" */
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#endif
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#endif /* BOARD_H */
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/** @} */
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