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https://github.com/RIOT-OS/RIOT.git
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1d95950ca1
This board is sold by several vendors on AliExpress, Amazon and ebay. It does not have name, but since it comes in the same form-factor and color as the Bluepill line of boards, I think it makes sense to use that name. Flashing is a bit cumbersome as I always had to press the reset button in time when OpenOCD tries to connect to the CPU. There is no dedicated reset pin exposed on the board.
154 lines
3.3 KiB
C
154 lines
3.3 KiB
C
/*
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* Copyright (C) 2020 Benjamin Valentin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_bluepill-stm32f030c8
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the bluepill-stm32f030c8 board
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*
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* @author Alexandre Abadie <alexandre.abadie@inria.fr>
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* @author Benjamin Valentin <benpicco@googlemail.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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/* This board provides a LSE */
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#ifndef CONFIG_BOARD_HAS_LSE
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#define CONFIG_BOARD_HAS_LSE 1
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#endif
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/* This board provides an HSE */
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#ifndef CONFIG_BOARD_HAS_HSE
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#define CONFIG_BOARD_HAS_HSE 1
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#endif
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#include "clk_conf.h"
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#include "cfg_i2c1_pb8_pb9.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.dev = TIM1,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB2ENR_TIM1EN,
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.bus = APB2,
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.irqn = TIM1_CC_IRQn
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},
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{
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.dev = TIM3,
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.max = 0x0000ffff,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.bus = APB1,
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.irqn = TIM3_IRQn
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},
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};
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#define TIMER_0_ISR (isr_tim1_cc)
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#define TIMER_1_ISR (isr_tim3)
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rcc_mask = RCC_APB2ENR_USART1EN,
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.rx_pin = GPIO_PIN(PORT_A, 10),
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.tx_pin = GPIO_PIN(PORT_A, 9),
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.rx_af = GPIO_AF1,
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.tx_af = GPIO_AF1,
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.bus = APB2,
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.irqn = USART1_IRQn
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}
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};
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#define UART_0_ISR (isr_usart1)
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name PWM configuration
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* @{
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*/
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static const pwm_conf_t pwm_config[] = {
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{
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.dev = TIM3,
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.rcc_mask = RCC_APB1ENR_TIM3EN,
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.chan = { { .pin = GPIO_PIN(PORT_A, 6), .cc_chan = 0},
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{ .pin = GPIO_PIN(PORT_A, 7), .cc_chan = 1},
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{ .pin = GPIO_UNDEF, .cc_chan = 0},
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{ .pin = GPIO_UNDEF, .cc_chan = 0} },
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.af = GPIO_AF1,
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.bus = APB1
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}
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};
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#define PWM_NUMOF ARRAY_SIZE(pwm_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = SPI1,
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.mosi_pin = GPIO_PIN(PORT_A, 7),
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.miso_pin = GPIO_PIN(PORT_A, 6),
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.sclk_pin = GPIO_PIN(PORT_A, 5),
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.cs_pin = GPIO_PIN(PORT_B, 1),
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.mosi_af = GPIO_AF0,
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.miso_af = GPIO_AF0,
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.sclk_af = GPIO_AF0,
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.cs_af = GPIO_AF0,
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.rccmask = RCC_APB2ENR_SPI1EN,
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.apbbus = APB2
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{ GPIO_PIN(PORT_A, 0), 0 },
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{ GPIO_PIN(PORT_A, 1), 1 },
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{ GPIO_PIN(PORT_A, 2), 2 },
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{ GPIO_PIN(PORT_A, 3), 3 },
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{ GPIO_PIN(PORT_A, 4), 4 },
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{ GPIO_PIN(PORT_A, 5), 5 }
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};
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#define ADC_NUMOF ARRAY_SIZE(adc_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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