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159 lines
7.1 KiB
C
159 lines
7.1 KiB
C
/*
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* Copyright (C) 2014-2015 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_stm32l1
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* @{
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*
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* @file
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* @brief Interrupt vector definitions
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Thomas Eichinger <thomas.eichinger@fu-berlin.de>
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*
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* @}
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*/
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#include <stdint.h>
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#include "vectors_cortexm.h"
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/* define a local dummy handler as it needs to be in the same compilation unit
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* as the alias definition */
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void dummy_handler(void) {
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dummy_handler_default();
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}
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/* STM32L1 specific interrupt vectors */
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WEAK_DEFAULT void isr_wwdg(void);
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WEAK_DEFAULT void isr_pvd(void);
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WEAK_DEFAULT void isr_tamper_stamp(void);
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WEAK_DEFAULT void isr_rtc_wkup(void);
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WEAK_DEFAULT void isr_flash(void);
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WEAK_DEFAULT void isr_rcc(void);
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WEAK_DEFAULT void isr_exti(void);
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WEAK_DEFAULT void isr_dma1_ch1(void);
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WEAK_DEFAULT void isr_dma1_ch2(void);
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WEAK_DEFAULT void isr_dma1_ch3(void);
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WEAK_DEFAULT void isr_dma1_ch4(void);
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WEAK_DEFAULT void isr_dma1_ch5(void);
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WEAK_DEFAULT void isr_dma1_ch6(void);
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WEAK_DEFAULT void isr_dma1_ch7(void);
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WEAK_DEFAULT void isr_adc1(void);
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WEAK_DEFAULT void isr_usb_hp(void);
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WEAK_DEFAULT void isr_usb_lp(void);
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WEAK_DEFAULT void isr_dac(void);
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WEAK_DEFAULT void isr_comp(void);
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WEAK_DEFAULT void isr_lcd(void);
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WEAK_DEFAULT void isr_tim9(void);
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WEAK_DEFAULT void isr_tim10(void);
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WEAK_DEFAULT void isr_tim11(void);
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WEAK_DEFAULT void isr_tim2(void);
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WEAK_DEFAULT void isr_tim3(void);
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WEAK_DEFAULT void isr_tim4(void);
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WEAK_DEFAULT void isr_i2c1_ev(void);
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WEAK_DEFAULT void isr_i2c1_er(void);
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WEAK_DEFAULT void isr_i2c2_ev(void);
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WEAK_DEFAULT void isr_i2c2_er(void);
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WEAK_DEFAULT void isr_spi1(void);
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WEAK_DEFAULT void isr_spi2(void);
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WEAK_DEFAULT void isr_usart1(void);
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WEAK_DEFAULT void isr_usart2(void);
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WEAK_DEFAULT void isr_usart3(void);
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WEAK_DEFAULT void isr_rtc_alarm(void);
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WEAK_DEFAULT void isr_usb_fs_wkup(void);
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WEAK_DEFAULT void isr_tim6(void);
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WEAK_DEFAULT void isr_tim7(void);
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WEAK_DEFAULT void isr_sdio(void);
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WEAK_DEFAULT void isr_tim5(void);
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WEAK_DEFAULT void isr_spi3(void);
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WEAK_DEFAULT void isr_uart4(void);
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WEAK_DEFAULT void isr_uart5(void);
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WEAK_DEFAULT void isr_dma2_ch1(void);
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WEAK_DEFAULT void isr_dma2_ch2(void);
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WEAK_DEFAULT void isr_dma2_ch3(void);
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WEAK_DEFAULT void isr_dma2_ch4(void);
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WEAK_DEFAULT void isr_dma2_ch5(void);
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WEAK_DEFAULT void isr_aes(void);
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WEAK_DEFAULT void isr_comp_acq(void);
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/* CPU specific interrupt vector table */
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ISR_VECTOR(1) const isr_t vector_cpu[CPU_IRQ_NUMOF] = {
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isr_wwdg, /* [0] Window WatchDog Interrupt */
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isr_pvd, /* [1] PVD through EXTI Line detection Interrupt */
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isr_tamper_stamp, /* [2] Tamper and Time Stamp through EXTI Line Interrupts */
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isr_rtc_wkup, /* [3] RTC Wakeup Timer through EXTI Line Interrupt */
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isr_flash, /* [4] FLASH global Interrupt */
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isr_rcc, /* [5] RCC global Interrupt */
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isr_exti, /* [6] EXTI Line0 Interrupt */
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isr_exti, /* [7] EXTI Line1 Interrupt */
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isr_exti, /* [8] EXTI Line2 Interrupt */
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isr_exti, /* [9] EXTI Line3 Interrupt */
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isr_exti, /* [10] EXTI Line4 Interrupt */
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isr_dma1_ch1, /* [11] DMA1 Channel 1 global Interrupt */
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isr_dma1_ch2, /* [12] DMA1 Channel 2 global Interrupt */
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isr_dma1_ch3, /* [13] DMA1 Channel 3 global Interrupt */
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isr_dma1_ch4, /* [14] DMA1 Channel 4 global Interrupt */
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isr_dma1_ch5, /* [15] DMA1 Channel 5 global Interrupt */
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isr_dma1_ch6, /* [16] DMA1 Channel 6 global Interrupt */
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isr_dma1_ch7, /* [17] DMA1 Channel 7 global Interrupt */
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isr_adc1, /* [18] ADC1 global Interrupt */
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isr_usb_hp, /* [19] USB High Priority Interrupt */
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isr_usb_lp, /* [20] USB Low Priority Interrupt */
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isr_dac, /* [21] DAC Interrupt */
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isr_comp, /* [22] Comparator through EXTI Line Interrupt */
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isr_exti, /* [23] External Line[9:5] Interrupts */
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isr_lcd, /* [24] LCD Interrupt */
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isr_tim9, /* [25] TIM9 global Interrupt */
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isr_tim10, /* [26] TIM10 global Interrupt */
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isr_tim11, /* [27] TIM11 global Interrupt */
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isr_tim2, /* [28] TIM2 global Interrupt */
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isr_tim3, /* [29] TIM3 global Interrupt */
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isr_tim4, /* [30] TIM4 global Interrupt */
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isr_i2c1_ev, /* [31] I2C1 Event Interrupt */
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isr_i2c1_er, /* [32] I2C1 Error Interrupt */
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isr_i2c2_ev, /* [33] I2C2 Event Interrupt */
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isr_i2c2_er, /* [34] I2C2 Error Interrupt */
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isr_spi1, /* [35] SPI1 global Interrupt */
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isr_spi2, /* [36] SPI2 global Interrupt */
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isr_usart1, /* [37] USART1 global Interrupt */
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isr_usart2, /* [38] USART2 global Interrupt */
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isr_usart3, /* [39] USART3 global Interrupt */
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isr_exti, /* [40] External Line[15:10] Interrupts */
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isr_rtc_alarm, /* [41] RTC Alarm through EXTI Line Interrupt */
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isr_usb_fs_wkup, /* [42] USB FS WakeUp from suspend through EXTI Line Interrupt */
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isr_tim6, /* [43] TIM6 global Interrupt */
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isr_tim7, /* [44] TIM7 global Interrupt */
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#if defined(CPU_MODEL_STM32L151RC)
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(0UL), /* [45] Reserved */
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isr_tim5, /* [46] TIM5 global Interrupt */
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isr_spi3, /* [47] SPI3 global Interrupt */
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(0UL), /* [48] Reserved */
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(0UL), /* [49] Reserved */
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isr_dma2_ch1, /* [50] DMA2 Channel 1 global Interrupt */
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isr_dma2_ch2, /* [51] DMA2 Channel 2 global Interrupt */
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isr_dma2_ch3, /* [52] DMA2 Channel 3 global Interrupt */
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isr_dma2_ch4, /* [53] DMA2 Channel 4 global Interrupt */
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isr_dma2_ch5, /* [54] DMA2 Channel 5 global Interrupt */
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isr_aes, /* [55] AES global Interrupt */
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isr_comp_acq /* [56] Comparator Channel Acquisition global Interrupt */
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#elif defined(CPU_MODEL_STM32L152RE)
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(0UL), /* [45] Reserved */
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isr_tim5, /* [46] TIM5 global Interrupt */
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isr_spi3, /* [47] SPI3 global Interrupt */
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isr_uart4, /* [48] UART4 global Interrupt */
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isr_uart5, /* [49] UART5 global Interrupt */
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isr_dma2_ch1, /* [50] DMA2 Channel 1 global Interrupt */
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isr_dma2_ch2, /* [51] DMA2 Channel 2 global Interrupt */
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isr_dma2_ch3, /* [52] DMA2 Channel 3 global Interrupt */
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isr_dma2_ch4, /* [53] DMA2 Channel 4 global Interrupt */
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isr_dma2_ch5, /* [54] DMA2 Channel 5 global Interrupt */
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isr_aes, /* [55] AES global Interrupt */
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isr_comp_acq /* [56] Comparator Channel Acquisition global Interrupt */
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#endif
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};
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