Gerson Fernando Budke 53235dd2e2 cpu/atxmega/atxmega_cpu: Fix clk sel after dfll en ... The current ATxmega clock_init enable DFLL to improve the accuracy of the 2MHz and 32MHz internal oscillators. In some ATxmega revisions, after started DFLL the clock become unstable. Add another sync point for 32MHz internal oscilator. Note: If clock is not stable, system won't switch from 2MHz to 32MHz as main clock. Signed-off-by: Gerson Fernando Budke <nandojve@gmail.com>		2021-03-28 11:40:39 -03:00
..
include
periph
atxmega_cpu.c	cpu/atxmega/atxmega_cpu: Fix clk sel after dfll en	2021-03-28 11:40:39 -03:00
doc.txt
Kconfig
Kconfig.XMEGAA
Kconfig.XMEGAB
Kconfig.XMEGAC
Kconfig.XMEGAD
Kconfig.XMEGAE
Makefile
Makefile.dep
Makefile.features
Makefile.include