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119 lines
2.4 KiB
Plaintext
119 lines
2.4 KiB
Plaintext
# Copyright (c) 2020 Inria
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#
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# This file is subject to the terms and conditions of the GNU Lesser
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# General Public License v2.1. See the file LICENSE in the top level
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# directory for more details.
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#
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menu "STM32 G0 clock configuration"
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depends on CPU_FAM_G0
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choice
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bool "Clock source selection"
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default USE_CLOCK_PLL
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config USE_CLOCK_PLL
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bool "PLL"
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config USE_CLOCK_HSE
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bool "Direct High frequency external oscillator (HSE)"
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depends on BOARD_HAS_HSE
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config USE_CLOCK_HSI
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bool "Direct High frequency internal oscillator (HSI16)"
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endchoice
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if USE_CLOCK_PLL
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config CLOCK_PLL_M
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int "M: PLLIN division factor"
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default 1
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range 1 8
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config CLOCK_PLL_N
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int "N: PLLIN multiply factor"
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default 20
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range 8 86
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config CLOCK_PLL_R
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int "Q: VCO division factor"
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default 6 if BOARD_HAS_HSE
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default 5 if !BOARD_HAS_HSE
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range 2 8
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endif
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choice
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bool "HSISYS division factor"
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default CLOCK_HSISYS_DIV_1
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depends on USE_CLOCK_HSI
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config CLOCK_HSISYS_DIV_1
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bool "Divide HSISYS by 1"
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config CLOCK_HSISYS_DIV_2
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bool "Divide HSISYS by 2"
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config CLOCK_HSISYS_DIV_4
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bool "Divide HSISYS by 4"
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config CLOCK_HSISYS_DIV_8
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bool "Divide HSISYS by 8"
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config CLOCK_HSISYS_DIV_16
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bool "Divide HSISYS by 16"
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config CLOCK_HSISYS_DIV_32
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bool "Divide HSISYS by 32"
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config CLOCK_HSISYS_DIV_64
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bool "Divide HSISYS by 64"
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config CLOCK_HSISYS_DIV_128
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bool "Divide HSISYS by 128"
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endchoice
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config CLOCK_HSISYS_DIV
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int
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default 1 if CLOCK_HSISYS_DIV_1
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default 2 if CLOCK_HSISYS_DIV_2
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default 4 if CLOCK_HSISYS_DIV_4
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default 8 if CLOCK_HSISYS_DIV_8
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default 16 if CLOCK_HSISYS_DIV_16
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default 32 if CLOCK_HSISYS_DIV_32
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default 64 if CLOCK_HSISYS_DIV_64
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default 128 if CLOCK_HSISYS_DIV_128
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choice
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bool "APB prescaler (division factor of HCLK to produce PCLK)"
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default CLOCK_APB1_DIV_1
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config CLOCK_APB1_DIV_1
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bool "Divide HCLK by 1"
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config CLOCK_APB1_DIV_2
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bool "Divide HCLK by 2"
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config CLOCK_APB1_DIV_4
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bool "Divide HCLK by 4"
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config CLOCK_APB1_DIV_8
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bool "Divide HCLK by 8"
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config CLOCK_APB1_DIV_16
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bool "Divide HCLK by 16"
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endchoice
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config CLOCK_APB1_DIV
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int
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default 1 if CLOCK_APB1_DIV_1
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default 2 if CLOCK_APB1_DIV_2
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default 4 if CLOCK_APB1_DIV_4
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default 8 if CLOCK_APB1_DIV_8
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default 16 if CLOCK_APB1_DIV_16
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endmenu
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source "$(RIOTBOARD)/common/stm32/Kconfig"
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