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113 lines
5.6 KiB
C
113 lines
5.6 KiB
C
/**
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* \file
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*
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* \brief Component description for RFCTRL
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*
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* Copyright (c) 2014 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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#ifndef _SAMR21_RFCTRL_COMPONENT_
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#define _SAMR21_RFCTRL_COMPONENT_
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* ========================================================================== */
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/** SOFTWARE API DEFINITION FOR RFCTRL */
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/* ========================================================================== */
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/** \addtogroup SAMR21_RFCTRL RF233 control module */
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/*@{*/
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#define RFCTRL_U2233
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#define REV_RFCTRL 0x100
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/* -------- RFCTRL_FECFG : (RFCTRL Offset: 0x0) (R/W 16) Front-end control bus configuration -------- */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef union {
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struct {
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uint16_t F0CFG:2; /*!< bit: 0.. 1 Front-end control signal 0 configuration */
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uint16_t F1CFG:2; /*!< bit: 2.. 3 Front-end control signal 1 configuration */
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uint16_t F2CFG:2; /*!< bit: 4.. 5 Front-end control signal 2 configuration */
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uint16_t F3CFG:2; /*!< bit: 6.. 7 Front-end control signal 3 configuration */
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uint16_t F4CFG:2; /*!< bit: 8.. 9 Front-end control signal 4 configuration */
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uint16_t F5CFG:2; /*!< bit: 10..11 Front-end control signal 5 configuration */
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uint16_t :4; /*!< bit: 12..15 Reserved */
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} bit; /*!< Structure used for bit access */
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uint16_t reg; /*!< Type used for register access */
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} RFCTRL_FECFG_Type;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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#define RFCTRL_FECFG_OFFSET 0x0 /**< \brief (RFCTRL_FECFG offset) Front-end control bus configuration */
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#define RFCTRL_FECFG_RESETVALUE 0x0000 /**< \brief (RFCTRL_FECFG reset_value) Front-end control bus configuration */
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#define RFCTRL_FECFG_F0CFG_Pos 0 /**< \brief (RFCTRL_FECFG) Front-end control signal 0 configuration */
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#define RFCTRL_FECFG_F0CFG_Msk (0x3u << RFCTRL_FECFG_F0CFG_Pos)
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#define RFCTRL_FECFG_F0CFG(value) ((RFCTRL_FECFG_F0CFG_Msk & ((value) << RFCTRL_FECFG_F0CFG_Pos)))
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#define RFCTRL_FECFG_F1CFG_Pos 2 /**< \brief (RFCTRL_FECFG) Front-end control signal 1 configuration */
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#define RFCTRL_FECFG_F1CFG_Msk (0x3u << RFCTRL_FECFG_F1CFG_Pos)
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#define RFCTRL_FECFG_F1CFG(value) ((RFCTRL_FECFG_F1CFG_Msk & ((value) << RFCTRL_FECFG_F1CFG_Pos)))
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#define RFCTRL_FECFG_F2CFG_Pos 4 /**< \brief (RFCTRL_FECFG) Front-end control signal 2 configuration */
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#define RFCTRL_FECFG_F2CFG_Msk (0x3u << RFCTRL_FECFG_F2CFG_Pos)
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#define RFCTRL_FECFG_F2CFG(value) ((RFCTRL_FECFG_F2CFG_Msk & ((value) << RFCTRL_FECFG_F2CFG_Pos)))
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#define RFCTRL_FECFG_F3CFG_Pos 6 /**< \brief (RFCTRL_FECFG) Front-end control signal 3 configuration */
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#define RFCTRL_FECFG_F3CFG_Msk (0x3u << RFCTRL_FECFG_F3CFG_Pos)
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#define RFCTRL_FECFG_F3CFG(value) ((RFCTRL_FECFG_F3CFG_Msk & ((value) << RFCTRL_FECFG_F3CFG_Pos)))
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#define RFCTRL_FECFG_F4CFG_Pos 8 /**< \brief (RFCTRL_FECFG) Front-end control signal 4 configuration */
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#define RFCTRL_FECFG_F4CFG_Msk (0x3u << RFCTRL_FECFG_F4CFG_Pos)
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#define RFCTRL_FECFG_F4CFG(value) ((RFCTRL_FECFG_F4CFG_Msk & ((value) << RFCTRL_FECFG_F4CFG_Pos)))
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#define RFCTRL_FECFG_F5CFG_Pos 10 /**< \brief (RFCTRL_FECFG) Front-end control signal 5 configuration */
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#define RFCTRL_FECFG_F5CFG_Msk (0x3u << RFCTRL_FECFG_F5CFG_Pos)
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#define RFCTRL_FECFG_F5CFG(value) ((RFCTRL_FECFG_F5CFG_Msk & ((value) << RFCTRL_FECFG_F5CFG_Pos)))
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#define RFCTRL_FECFG_MASK 0x0FFFu /**< \brief (RFCTRL_FECFG) MASK Register */
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/** \brief RFCTRL hardware registers */
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#if !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__))
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typedef struct {
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__IO RFCTRL_FECFG_Type FECFG; /**< \brief Offset: 0x0 (R/W 16) Front-end control bus configuration */
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} Rfctrl;
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#endif /* !(defined(__ASSEMBLY__) || defined(__IAR_SYSTEMS_ASM__)) */
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/*@}*/
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#ifdef __cplusplus
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}
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#endif
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#endif /* _SAMR21_RFCTRL_COMPONENT_ */
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