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54e915e40d
Make sure the STATUS register has been synced between the different clock domains. Especially the LETIMER needs some time to update the STATUS register after it has been enabled. If the LETIMER is started and stopped with just a short delay, pm_layered gets confused because the timer seems to be inactive ...
362 lines
8.2 KiB
C
362 lines
8.2 KiB
C
/*
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* Copyright (C) 2022 SSV Software Systems GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_efm32
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* @ingroup drivers_periph_timer
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* @{
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*
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* @file
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* @brief Low-level timer driver implementation
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*
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* @author Juergen Fitschen <me@jue.yt>
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* @}
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*/
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#include "cpu.h"
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#include "log.h"
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#include "assert.h"
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#include "periph/timer.h"
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#include "periph_conf.h"
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#include "pm_layered.h"
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#include "em_cmu.h"
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#include "em_timer.h"
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#include "em_timer_utils.h"
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#include "em_letimer.h"
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/**
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* @brief These power modes will be blocked while the timer is running
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*/
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#ifndef TIMER_PM_BLOCKER
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#define TIMER_PM_BLOCKER EFM32_PM_MODE_EM2
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#endif
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#ifndef LETIMER_PM_BLOCKER
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#define LETIMER_PM_BLOCKER EFM32_PM_MODE_EM3
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#endif
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/**
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* @brief Timer state memory
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*/
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static timer_isr_ctx_t isr_ctx[TIMER_NUMOF];
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/**
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* @brief Check whether dev is using a LETIMER device
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*/
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static inline bool _is_letimer(tim_t dev)
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{
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#if defined(LETIMER_COUNT) && (LETIMER_COUNT > 0)
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return ((uint32_t) timer_config[dev].dev) == LETIMER0_BASE;
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#else
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(void) dev;
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return false;
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#endif
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}
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#define LETIMER_CH_VALID(x) (x < 2)
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static inline void _letimer_init(tim_t dev, uint32_t freq)
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{
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(void) freq;
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assert(freq == CMU_ClockFreqGet(timer_config[dev].cmu));
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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/* disable and clear interrupts */
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LETIMER_IntDisable(tim, LETIMER_IEN_COMP0 | LETIMER_IEN_COMP1);
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LETIMER_IntClear(tim, LETIMER_IF_COMP0 | LETIMER_IF_COMP1);
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/* initialize timer without starting it yet */
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LETIMER_Init_TypeDef init = LETIMER_INIT_DEFAULT;
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init.enable = false;
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init.topValue = LETIMER_MAX_VALUE;
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LETIMER_Init(tim, &init);
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}
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static inline void _timer_init(tim_t dev, uint32_t freq)
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{
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/* bring peripheral into known state */
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TIMER_Reset(timer_config[dev].dev);
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/* get input clock of the timer */
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uint32_t clk_freq = CMU_ClockFreqGet(timer_config[dev].cmu);
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/* initialize timer */
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TIMER_Init_TypeDef init = TIMER_INIT_DEFAULT;
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init.enable = false;
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init.prescale = (clk_freq / freq) - 1;
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/* check if any rounding errors occurred */
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assert(clk_freq / (init.prescale + 1) == freq);
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TIMER_Init(timer_config[dev].dev, &init);
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/* set top variable */
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TIMER_TopSet(timer_config[dev].dev, TIMER_MAX_VALUE);
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/* initialize CC channels */
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TIMER_InitCC_TypeDef init_cc = TIMER_INITCC_DEFAULT;
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init_cc.mode = timerCCModeCompare;
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for (size_t i = 0; TIMER_CH_VALID(i); i++) {
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TIMER_InitCC(timer_config[dev].dev, i, &init_cc);
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}
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}
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int timer_init(tim_t dev, uint32_t freq, timer_cb_t callback, void *arg)
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{
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assert(dev < TIMER_NUMOF);
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/* enable clocks */
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CMU_ClockEnable(timer_config[dev].cmu, true);
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/* init underlying hardware */
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_is_letimer(dev) ? _letimer_init(dev, freq) : _timer_init(dev, freq);
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/* save callback */
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isr_ctx[dev].cb = callback;
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isr_ctx[dev].arg = arg;
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/* setup Cortex-M IRQ line */
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NVIC_ClearPendingIRQ(timer_config[dev].irq);
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NVIC_EnableIRQ(timer_config[dev].irq);
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timer_start(dev);
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return 0;
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}
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static inline int _letimer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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if (!LETIMER_CH_VALID(channel)) {
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return -1;
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}
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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/* LETIMER is countdown only, so we invert the value */
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value = LETIMER_MAX_VALUE - value;
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LETIMER_CompareSet(tim, channel, value);
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uint32_t irq_bit = (LETIMER_IF_COMP0 << channel);
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LETIMER_IntClear(tim, irq_bit);
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LETIMER_IntEnable(tim, irq_bit);
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return 0;
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}
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static inline int _timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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if (!TIMER_CH_VALID(channel)) {
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return -1;
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}
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TIMER_TypeDef *tim = timer_config[dev].dev;
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uint32_t irq_bit = (TIMER_IF_CC0 << channel);
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/* make sure to clear previously set irqs */
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TIMER_IntClear(tim, irq_bit);
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/* set compare value */
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TIMER_CompareSet(tim, channel, value);
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/* turn on IRQs */
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TIMER_IntEnable(tim, irq_bit);
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return 0;
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}
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int timer_set_absolute(tim_t dev, int channel, unsigned int value)
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{
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return _is_letimer(dev) ? _letimer_set_absolute(dev, channel, value) : _timer_set_absolute(dev, channel, value);
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}
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static inline int _letimer_clear(tim_t dev, int channel)
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{
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if (!LETIMER_CH_VALID(channel)) {
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return -1;
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}
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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uint32_t irq_bit = (LETIMER_IF_COMP0 << channel);
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LETIMER_IntDisable(tim, irq_bit);
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LETIMER_IntClear(tim, irq_bit);
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return 0;
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}
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static inline int _timer_clear(tim_t dev, int channel)
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{
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if (!TIMER_CH_VALID(channel)) {
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return -1;
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}
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/* turn off output compare IRQ */
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TIMER_IntDisable(timer_config[dev].dev, (TIMER_IF_CC0 << channel));
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return 0;
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}
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int timer_clear(tim_t dev, int channel)
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{
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return _is_letimer(dev) ? _letimer_clear(dev, channel) : _timer_clear(dev, channel);
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}
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static inline unsigned int _letimer_read(tim_t dev)
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{
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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/* LETIMER is countdown only, so we invert the value */
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return (unsigned int) LETIMER_MAX_VALUE - LETIMER_CounterGet(tim);
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}
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static inline unsigned int _timer_read(tim_t dev)
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{
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TIMER_TypeDef *tim = timer_config[dev].dev;
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return (unsigned int) TIMER_CounterGet(tim);
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}
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unsigned int timer_read(tim_t dev)
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{
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return _is_letimer(dev) ? _letimer_read(dev) : _timer_read(dev);
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}
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static inline bool _letimer_is_running(LETIMER_TypeDef *tim)
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{
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/* make sure registers are up-to-date and
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* we can rely on the STATS register */
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LETIMER_SyncWait(tim);
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return tim->STATUS & LETIMER_STATUS_RUNNING;
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}
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static inline bool _timer_is_running(TIMER_TypeDef *tim)
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{
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/* make sure registers are up-to-date and
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* we can rely on the STATS register */
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TIMER_SyncWait(tim);
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return tim->STATUS & TIMER_STATUS_RUNNING;
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}
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static inline void _letimer_stop(tim_t dev)
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{
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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if (_letimer_is_running(tim)) {
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pm_unblock(LETIMER_PM_BLOCKER);
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}
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LETIMER_Enable(tim, false);
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}
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static inline void _timer_stop(tim_t dev)
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{
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TIMER_TypeDef *tim = timer_config[dev].dev;
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if (_timer_is_running(tim)) {
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pm_unblock(TIMER_PM_BLOCKER);
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}
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TIMER_Enable(tim, false);
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}
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void timer_stop(tim_t dev)
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{
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_is_letimer(dev) ? _letimer_stop(dev) : _timer_stop(dev);
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}
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static inline void _letimer_start(tim_t dev)
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{
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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if (!_letimer_is_running(tim)) {
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pm_block(LETIMER_PM_BLOCKER);
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}
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LETIMER_Enable(tim, true);
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}
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static inline void _timer_start(tim_t dev)
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{
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TIMER_TypeDef *tim = timer_config[dev].dev;
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if (!_timer_is_running(tim)) {
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pm_block(TIMER_PM_BLOCKER);
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}
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TIMER_Enable(tim, true);
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}
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void timer_start(tim_t dev)
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{
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_is_letimer(dev) ? _letimer_start(dev) : _timer_start(dev);
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}
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static inline void _letimer_isr(tim_t dev)
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{
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LETIMER_TypeDef *tim = timer_config[dev].dev;
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for (int i = 0; TIMER_CH_VALID(i); i++) {
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if (tim->IF & (LETIMER_IF_COMP0 << i))
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{
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LETIMER_IntDisable(tim, LETIMER_IEN_COMP0 << i);
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LETIMER_IntClear(tim, LETIMER_IF_COMP0 << i);
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isr_ctx[dev].cb(isr_ctx[dev].arg, i);
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}
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}
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}
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static inline void _timer_isr(tim_t dev)
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{
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TIMER_TypeDef *tim = timer_config[dev].dev;
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for (size_t i = 0; TIMER_CH_VALID(i); i++) {
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uint32_t irq_bit = (TIMER_IF_CC0 << i);
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if (TIMER_IntGetEnabled(tim) & irq_bit) {
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TIMER_IntDisable(tim, irq_bit);
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TIMER_IntClear(tim, irq_bit);
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isr_ctx[dev].cb(isr_ctx[dev].arg, i);
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}
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}
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}
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static void _isr(tim_t dev)
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{
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_is_letimer(dev) ? _letimer_isr(dev) : _timer_isr(dev);
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cortexm_isr_end();
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}
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#ifdef TIMER_0_ISR
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void TIMER_0_ISR(void)
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{
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_isr(0);
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}
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#endif /* TIMER_0_ISR */
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#ifdef TIMER_1_ISR
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void TIMER_1_ISR(void)
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{
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_isr(1);
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}
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#endif /* TIMER_1_ISR */
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#ifdef TIMER_2_ISR
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void TIMER_2_ISR(void)
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{
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_isr(2);
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}
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#endif /* TIMER_2_ISR */
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#ifdef TIMER_3_ISR
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void TIMER_3_ISR(void)
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{
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_isr(3);
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}
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#endif /* TIMER_3_ISR */
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