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https://github.com/RIOT-OS/RIOT.git
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157 lines
3.8 KiB
C
157 lines
3.8 KiB
C
/*
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* Copyright (C) 2017 Baptiste Clenet <bapclenet@gmail.com>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_samr30-xpro
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* @{
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*
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* @file
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* @brief Peripheral MCU configuration for the Atmel SAM R30 Xplained Pro board
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*
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* @author Baptiste Clenet <bapclenet@gmail.com>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief GCLK reference speed
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*/
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#define CLOCK_CORECLOCK (16000000U)
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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#define TIMER_NUMOF (1U)
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#define TIMER_0_EN 1
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/* Timer 0 configuration */
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#define TIMER_0_DEV TC0->COUNT32
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#define TIMER_0_CHANNELS 1
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#define TIMER_0_MAX_VALUE (0xffffffff)
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#define TIMER_0_ISR isr_tc0
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{ /* Virtual COM Port */
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.dev = &SERCOM0->USART,
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.rx_pin = GPIO_PIN(PA,5),
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.tx_pin = GPIO_PIN(PA,4),
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.mux = GPIO_MUX_D,
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.rx_pad = UART_PAD_RX_1,
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.tx_pad = UART_PAD_TX_0,
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.flags = UART_FLAG_NONE,
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.gclk_src = GCLK_PCHCTRL_GEN_GCLK0
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}
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};
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/* interrupt function name mapping */
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#define UART_0_ISR isr_sercom0
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#define UART_NUMOF (sizeof(uart_config) / sizeof(uart_config[0]))
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.dev = &(SERCOM4->SPI),
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.miso_pin = GPIO_PIN(PC, 19),
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.mosi_pin = GPIO_PIN(PB, 30),
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.clk_pin = GPIO_PIN(PC, 18),
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.miso_mux = GPIO_MUX_F,
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.mosi_mux = GPIO_MUX_F,
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.clk_mux = GPIO_MUX_F,
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.miso_pad = SPI_PAD_MISO_0,
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.mosi_pad = SPI_PAD_MOSI_2_SCK_3
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}
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};
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#define SPI_NUMOF (sizeof(spi_config) / sizeof(spi_config[0]))
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = &(SERCOM1->I2CM),
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PA, 17),
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.sda_pin = GPIO_PIN(PA, 16),
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.mux = GPIO_MUX_C,
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.gclk_src = GCLK_PCHCTRL_GEN_GCLK0,
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.flags = I2C_FLAG_NONE
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}
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};
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#define I2C_NUMOF (sizeof(i2c_config) / sizeof(i2c_config[0]))
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/** @} */
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/**
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* @name RTC configuration
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* @{
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*/
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#define RTC_NUMOF (1)
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#define EXTERNAL_OSC32_SOURCE 1
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#define INTERNAL_OSC32_SOURCE 0
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#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#define RTT_FREQUENCY (32768U)
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#define RTT_MAX_VALUE (0xffffffffU)
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#define RTT_NUMOF (1)
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/** @} */
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/**
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* @name ADC Configuration
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* @{
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*/
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#define ADC_NUMOF (5U)
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/* ADC 0 Default values */
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#define ADC_0_CLK_SOURCE 0 /* GCLK_GENERATOR_0 */
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#define ADC_0_PRESCALER ADC_CTRLB_PRESCALER_DIV256
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static const adc_conf_chan_t adc_channels[] = {
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/* port, pin, muxpos */
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{GPIO_PIN(PA, 6), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN6)}, /* EXT1, pin 3 */
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{GPIO_PIN(PA, 7), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN7)}, /* EXT1, pin 4 */
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{GPIO_PIN(PA, 10), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN18)},
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{GPIO_PIN(PA, 11), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN19)},
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{GPIO_PIN(PA, 2), ADC_INPUTCTRL_MUXPOS(ADC_INPUTCTRL_MUXPOS_AIN0)}
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};
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#define ADC_0_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
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#define ADC_0_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC2
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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