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89 lines
2.6 KiB
C
89 lines
2.6 KiB
C
/*
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* Copyright (C) 2016 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32f1
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* @{
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*
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* @file
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* @brief Low-level flash page driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "cpu.h"
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#include "assert.h"
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#include "periph/flashpage.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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void flashpage_write(int page, void *data)
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{
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assert(page < FLASHPAGE_NUMOF);
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uint16_t *page_addr = flashpage_addr(page);
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uint16_t *data_addr = (uint16_t *)data;
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uint32_t hsi_state = (RCC->CR & RCC_CR_HSION);
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/* the internal RC oscillator (HSI) must be enabled */
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RCC->CR |= (RCC_CR_HSION);
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while (!(RCC->CR & RCC_CR_HSIRDY)) {}
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/* unlock the flash module */
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DEBUG("[flashpage] unlocking the flash module\n");
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if (FLASH->CR & FLASH_CR_LOCK) {
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FLASH->KEYR = FLASH_KEY1;
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FLASH->KEYR = FLASH_KEY2;
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}
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/* ERASE sequence */
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/* make sure no flash operation is ongoing */
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DEBUG("[flashpage] erase: waiting for any operation to finish\n");
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while (FLASH->SR & FLASH_SR_BSY) {}
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/* set page erase bit and program page address */
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DEBUG("[flashpage] erase: setting the erase bit and page address\n");
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FLASH->CR |= FLASH_CR_PER;
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FLASH->AR = (uint32_t)flashpage_addr(page);
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DEBUG("address to erase: %p\n", flashpage_addr(page));
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/* trigger the page erase and wait for it to be finished */
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DEBUG("[flashpage] erase: trigger the page erase\n");
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FLASH->CR |= FLASH_CR_STRT;
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DEBUG("[flashpage] erase: wait as long as device is busy\n");
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while (FLASH->SR & FLASH_SR_BSY) {}
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/* reset PER bit */
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DEBUG("[flashpage] erase: resetting the page erase bit\n");
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FLASH->CR &= ~(FLASH_CR_PER);
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/* WRITE sequence */
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if (data != NULL) {
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DEBUG("[flashpage] write: now writing the data\n");
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/* set PG bit and program page to flash */
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FLASH->CR |= FLASH_CR_PG;
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for (unsigned i = 0; i < (FLASHPAGE_SIZE / 2); i++) {
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*page_addr++ = data_addr[i];
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while (FLASH->SR & FLASH_SR_BSY) {}
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}
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/* clear program bit again */
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FLASH->CR &= ~(FLASH_CR_PG);
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DEBUG("[flashpage] write: done writing data\n");
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}
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/* finally, lock the flash module again */
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DEBUG("flashpage] now locking the flash module again\n");
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FLASH->CR |= FLASH_CR_LOCK;
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/* restore the HSI state */
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if (hsi_state) {
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RCC->CR &= ~(RCC_CR_HSION);
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while (RCC->CR & RCC_CR_HSIRDY) {}
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}
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}
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