mirror of
https://github.com/RIOT-OS/RIOT.git
synced 2024-12-29 04:50:03 +01:00
05f114d0af
- most were trivial
- missing group close or open
- extra space
- no doxygen comment
- name commad might open an implicit group
this hould also be implicit cosed but does not happen somtimes
- crazy: internal declared groups have to be closed internal
155 lines
3.5 KiB
C
155 lines
3.5 KiB
C
/*
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* Copyright (C) 2015 HAW Hamburg
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_lis3mdl
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*
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* @{
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*
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* @file
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* @brief Definitions for the LIS3MDL 3-axis magnetometer
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*
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* @author René Herthel <rene-herthel@outlook.de>
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*/
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#ifndef LIS3MDL_INTERNAL_H
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#define LIS3MDL_INTERNAL_H
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name LIS3DML chip identification
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* @{
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*/
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#define LIS3MDL_CHIP_ID (0x3D)
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#define LIS3MDL_CHIP_ADDR (0x1C)
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/** @} */
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/**
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* @name LIS3DML device identification register
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* @{
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*/
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#define LIS3DML_WHO_AM_I_REG (0x0F)
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/** @} */
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/**
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* @name LIS3DML control register
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* @{
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*/
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#define LIS3MDL_CTRL_REG1 (0x20)
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#define LIS3MDL_CTRL_REG2 (0x21)
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#define LIS3MDL_CTRL_REG3 (0x22)
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#define LIS3MDL_CTRL_REG4 (0x23)
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#define LIS3MDL_CTRL_REG5 (0x24)
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/** @} */
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/**
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* @name LIS3DML masks for CTRL_REG1
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* @{
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*/
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#define LIS3MDL_MASK_REG1_TEMP_EN (0x80)
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/** @} */
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/**
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* @name LIS3DML masks for CTRL_REG2
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* @{
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*/
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#define LIS3MDL_MASK_REG2_REBOOT (0x06)
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#define LIS3MDL_MASK_REG2_SOFT_RST (0x04)
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/** @} */
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/**
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* @name LIS3DML masks for CTRL_REG3
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* @{
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*/
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#define LIS3MDL_MASK_REG3_LOW_POWER_EN (0x02)
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#define LIS3MDL_MASK_REG3_CONT_CONV_MODE (0x00)
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#define LIS3MDL_MASK_REG3_Z_LOW_POWER (0x00)
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#define LIS3MDL_MASK_REG3_Z_MEDIUM_POWER (0x04)
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/** @} */
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/**
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* @name LIS3DML masks for CTRL_REG5
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* @{
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*/
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#define LIS3MDL_MASK_REG5_BDU (0x40)
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#define LIS3MDL_MASK_REG5_BDU_OFF (0x00)
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/** @} */
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/**
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* @name LIS3DML status register
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* @{
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*/
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#define LIS3MDL_STATUS_REG (0x27)
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/** @} */
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/**
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* @name LIS3DML magnometer output register
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* @{
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*/
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#define LIS3MDL_OUT_X_L_REG (0x28)
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#define LIS3MDL_OUT_X_H_REG (0x29)
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#define LIS3MDL_OUT_Y_L_REG (0x2A)
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#define LIS3MDL_OUT_Y_H_REG (0x2B)
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#define LIS3MDL_OUT_Z_L_REG (0x2C)
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#define LIS3MDL_OUT_Z_H_REG (0x2D)
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/** @} */
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/**
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* @name LIS3DML temperature output register
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* @{
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*/
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#define LIS3MDL_TEMP_OUT_L_REG (0x2E)
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#define LIS3MDL_TEMP_OUT_H_REG (0x2F)
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/** @} */
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/**
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* @name LIS3DML interrupt register
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* @{
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*/
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#define LIS3MDL_INT_CFG_REG (0x30)
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#define LIS3MDL_INT_SRC_REG (0x31)
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#define LIS3MDL_INT_THS_L_REG (0x32)
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#define LIS3MDL_INT_THS_H_REG (0x33)
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/** @} */
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/**
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* @name LIS3MDL masks for interrupt cfg register
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* @{
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*/
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#define LIS3MDL_MASK_INT_CFG_XIEN (0x80)
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#define LIS3MDL_MASK_INT_CFG_YIEN (0x40)
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#define LIS3MDL_MASK_INT_CFG_ZIEN (0x20)
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#define LIS3MDL_MASK_INT_CFG_IEA (0x04)
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#define LIS3MDL_MASK_INT_CFG_LIR (0x02)
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#define LIS3MDL_MASK_INT_CFG_IEN (0x01)
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/** @} */
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/**
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* @name LIS3MDL masks for interrupt src register
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* @{
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*/
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#define LIS3MDL_MASK_INT_SRC_PTH_X (0x80)
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#define LIS3MDL_MASK_INT_SRC_PTH_Y (0x40)
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#define LIS3MDL_MASK_INT_SRC_PTH_Z (0x20)
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#define LIS3MDL_MASK_INT_SRC_NTH_X (0x10)
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#define LIS3MDL_MASK_INT_SRC_NTH_Y (0x08)
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#define LIS3MDL_MASK_INT_SRC_NTH_Z (0x04)
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#define LIS3MDL_MASK_INT_SRC_MROI (0x02)
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#define LIS3MDL_MASK_INT_SRC_INT (0x01)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* LIS3MDL_INTERNAL_H */
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/** @} */
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