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https://github.com/RIOT-OS/RIOT.git
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332 lines
9.3 KiB
C
332 lines
9.3 KiB
C
/*
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* Copyright (C) 2019 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_at86rf215
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* @{
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*
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* @file
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* @brief Configuration of the MR-OFDM PHY on the AT86RF215 chip
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*
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* @author Benjamin Valentin <benjamin.valentin@ml-pa.com>
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* @}
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*/
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#include "at86rf215.h"
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#include "at86rf215_internal.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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/* symbol time is always 120 µs for MR-OFDM */
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#define OFDM_SYMBOL_TIME_US 120
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/* IEEE Std 802.15.4g™-2012 Amendment 3
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* Table 68d—Total number of channels and first channel center frequencies for SUN PHYs */
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static uint32_t _channel_spacing_kHz(uint8_t option)
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{
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switch (option) {
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case 1: return 1200;
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case 2: return 800;
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case 3: return 400;
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case 4: return 200;
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}
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return 0;
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}
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/* IEEE Std 802.15.4g™-2012 Amendment 3
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* Table 68d—Total number of channels and first channel center frequencies for SUN PHYs */
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static uint32_t _channel_center_freq_kHz_868MHz(uint8_t option)
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{
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switch (option) {
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case 1: return 863625;
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case 2: return 863425;
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case 3: return 863225;
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case 4: return 863125;
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}
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return 0;
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}
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/* IEEE Std 802.15.4g™-2012 Amendment 3
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* Table 68d—Total number of channels and first channel center frequencies for SUN PHYs */
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static uint32_t _channel_center_freq_kHz_2400MHz(uint8_t option)
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{
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return 2400000 + _channel_spacing_kHz(option) - CCF0_24G_OFFSET;
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}
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/* IEEE Std 802.15.4g™-2012 Amendment 3
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* Table 68d—Total number of channels and first channel center frequencies for SUN PHYs */
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static uint16_t _get_max_chan(at86rf215_t *dev, uint8_t option)
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{
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if (is_subGHz(dev)) {
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switch (option) {
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case 1: return 5;
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case 2: return 8;
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case 3: return 17;
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case 4: return 34;
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}
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}
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else {
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switch (option) {
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case 1: return 64;
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case 2: return 97;
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case 3: return 207;
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case 4: return 416;
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}
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}
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return 0;
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}
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/* Table 6-90. Recommended Transmitter Frontend Configuration */
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static uint32_t _TXCUTC_LPFCUT(uint8_t option)
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{
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switch (option) {
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case 1: return 10 << TXCUTC_LPFCUT_SHIFT;
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case 2: return 8 << TXCUTC_LPFCUT_SHIFT;
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case 3: return 5 << TXCUTC_LPFCUT_SHIFT;
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case 4: return 3 << TXCUTC_LPFCUT_SHIFT;
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}
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return 0;
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}
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/* Table 6-90. Recommended Transmitter Frontend Configuration */
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static uint32_t _TXDFE_SR(uint8_t option)
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{
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switch (option) {
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case 1:
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case 2: return 3 << TXDFE_SR_SHIFT;
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case 3:
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case 4: return 6 << TXDFE_SR_SHIFT;
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}
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return 0;
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}
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/* Table 6-90. Recommended Transmitter Frontend Configuration */
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static uint32_t _TXDFE_RCUT(uint8_t option)
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{
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switch (option) {
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case 1: return 3 << TXDFE_RCUT_SHIFT;
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case 2:
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case 3: return 3 << TXDFE_RCUT_SHIFT;
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case 4: return 2 << TXDFE_RCUT_SHIFT;
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}
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return 0;
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}
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/* Table 6-93. Recommended PHY Receiver and Digital Frontend Configuration */
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static uint32_t _RXDFE_RCUT(uint8_t option, bool superGHz)
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{
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switch (option) {
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case 1: return 4 << RXDFE_RCUT_SHIFT;
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case 2: return 2 << RXDFE_RCUT_SHIFT;
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case 3: return (2 + superGHz) << RXDFE_RCUT_SHIFT;
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case 4: return 1 << RXDFE_RCUT_SHIFT;
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}
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return 0;
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}
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/* Table 6-93. Recommended PHY Receiver and Digital Frontend Configuration */
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static uint32_t _RXBWC_BW(uint8_t option, bool superGHz)
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{
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switch (option) {
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case 1: return (9 + superGHz) << RXBWC_BW_SHIFT;
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case 2: return 7 << RXBWC_BW_SHIFT;
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case 3: return (4 + superGHz) << RXBWC_BW_SHIFT;
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case 4: return (2 + superGHz) << RXBWC_BW_SHIFT;
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}
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return 0;
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}
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/* Table 6-93. Recommended PHY Receiver and Digital Frontend Configuration */
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static uint32_t _RXBWC_IFS(uint8_t option, bool superGHz)
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{
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switch (option) {
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case 1:
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case 2: return 1;
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case 3: return superGHz;
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case 4: return !superGHz;
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}
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return 0;
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}
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static void _set_option(at86rf215_t *dev, uint8_t option)
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{
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const bool superGHz = !is_subGHz(dev);
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/* Set Receiver Bandwidth */
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at86rf215_reg_write(dev, dev->RF->RG_RXBWC,
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_RXBWC_BW(option, superGHz) | _RXBWC_IFS(option, superGHz));
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/* Set fS (same as TX); fCUT for RX */
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at86rf215_reg_write(dev, dev->RF->RG_RXDFE,
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_TXDFE_SR(option) | _RXDFE_RCUT(option, superGHz));
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/* Set Power Amplifier Ramp Time; fLPCUT */
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at86rf215_reg_write(dev, dev->RF->RG_TXCUTC,
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RF_PARAMP8U | _TXCUTC_LPFCUT(option));
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/* Set fS; fCUT for TX */
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at86rf215_reg_write(dev, dev->RF->RG_TXDFE,
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_TXDFE_SR(option) | _TXDFE_RCUT(option));
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/* set channel spacing with 25 kHz resolution */
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at86rf215_reg_write(dev, dev->RF->RG_CS, _channel_spacing_kHz(option) / 25);
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/* set channel center frequency with 25 kHz resolution */
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if (superGHz) {
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at86rf215_reg_write16(dev, dev->RF->RG_CCF0L,
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1 + _channel_center_freq_kHz_2400MHz(option) / 25);
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}
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else {
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at86rf215_reg_write16(dev, dev->RF->RG_CCF0L,
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1 + _channel_center_freq_kHz_868MHz(option) / 25);
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}
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at86rf215_reg_write(dev, dev->BBC->RG_OFDMC, option - 1);
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/* make sure channel config is still valid */
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dev->num_chans = _get_max_chan(dev, option);
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dev->netdev.chan = at86rf215_chan_valid(dev, dev->netdev.chan);
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at86rf215_reg_write16(dev, dev->RF->RG_CNL, dev->netdev.chan);
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}
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static unsigned _get_frame_duration(uint8_t option, uint8_t scheme,
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uint8_t bytes)
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{
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/* Table 150 - phySymbolsPerOctet values for MR-OFDM PHY, IEEE 802.15.4g-2012 */
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static const uint8_t quot[] = { 3, 3, 6, 12, 18, 24, 36 };
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--option;
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/* phyMaxFrameDuration = phySHRDuration + phyPHRDuration + ceiling [(aMaxPHYPacketSize + 1) x phySymbolsPerOctet] */
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const unsigned phySHRDuration = 6;
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const unsigned phyPHRDuration = option ? 6 : 3;
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const unsigned phyPDUDuration = ((bytes + 1) * (1 << option) + quot[scheme] - 1)
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/ quot[scheme];
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return (phySHRDuration + phyPHRDuration + phyPDUDuration) * OFDM_SYMBOL_TIME_US;
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}
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static void _set_ack_timeout(at86rf215_t *dev, uint8_t option, uint8_t scheme)
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{
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dev->ack_timeout_usec = dev->csma_backoff_period
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+ IEEE802154G_ATURNAROUNDTIME_US
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+ _get_frame_duration(option, scheme,
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AT86RF215_ACK_PSDU_BYTES);
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DEBUG("[%s] ACK timeout: %" PRIu32 " µs\n", "OFDM", dev->ack_timeout_usec);
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}
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static bool _option_mcs_valid(uint8_t option, uint8_t mcs)
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{
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if (option < 1 || option > 4) {
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return false;
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}
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if (mcs > BB_MCS_16QAM_3BY4) {
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return false;
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}
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if (mcs == BB_MCS_BPSK_REP4 && option > 2) {
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return false;
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}
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if (mcs == BB_MCS_BPSK_REP2 && option == 4) {
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return false;
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}
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return true;
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}
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int at86rf215_configure_OFDM(at86rf215_t *dev, uint8_t option, uint8_t scheme)
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{
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if (!_option_mcs_valid(option, scheme)) {
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DEBUG("[%s] invalid option/MCS: %d | %d\n", __func__, option, scheme);
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return -EINVAL;
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}
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at86rf215_await_state_end(dev, RF_STATE_TX);
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/* disable radio */
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at86rf215_reg_write(dev, dev->BBC->RG_PC, 0);
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/* set receiver gain target according to data sheet */
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at86rf215_reg_write(dev, dev->RF->RG_AGCS, 3 << AGCS_TGT_SHIFT);
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/* enable automatic receiver gain */
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at86rf215_reg_write(dev, dev->RF->RG_AGCC, AGCC_EN_MASK);
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_set_option(dev, option);
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at86rf215_reg_write(dev, dev->BBC->RG_OFDMPHRTX, scheme);
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dev->csma_backoff_period = IEEE802154G_ATURNAROUNDTIME_US
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+ IEEE802154_CCA_DURATION_IN_SYMBOLS
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* OFDM_SYMBOL_TIME_US;
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DEBUG("[%s] CSMA BACKOFF: %" PRIu32 " µs\n", "OFDM",
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dev->csma_backoff_period);
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_set_ack_timeout(dev, option, scheme);
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/* disable FSK preamble switching */
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#ifdef MODULE_NETDEV_IEEE802154_MR_FSK
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dev->fsk_pl = 0;
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#endif
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at86rf215_enable_radio(dev, BB_MROFDM);
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return 0;
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}
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int at86rf215_OFDM_set_scheme(at86rf215_t *dev, uint8_t scheme)
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{
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uint8_t option = at86rf215_OFDM_get_option(dev);
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if (!_option_mcs_valid(option, scheme)) {
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DEBUG("[%s] invalid MCS: %d\n", __func__, scheme);
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return -1;
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}
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at86rf215_await_state_end(dev, RF_STATE_TX);
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at86rf215_reg_write(dev, dev->BBC->RG_OFDMPHRTX, scheme);
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_set_ack_timeout(dev, at86rf215_OFDM_get_option(dev), scheme);
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return 0;
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}
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uint8_t at86rf215_OFDM_get_scheme(at86rf215_t *dev)
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{
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return at86rf215_reg_read(dev, dev->BBC->RG_OFDMPHRTX) & OFDMPHRTX_MCS_MASK;
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}
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int at86rf215_OFDM_set_option(at86rf215_t *dev, uint8_t option)
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{
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uint8_t mcs = at86rf215_OFDM_get_scheme(dev);
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if (!_option_mcs_valid(option, mcs)) {
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DEBUG("[%s] invalid option: %d\n", __func__, option);
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return -1;
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}
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at86rf215_await_state_end(dev, RF_STATE_TX);
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_set_option(dev, option);
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_set_ack_timeout(dev, option, mcs);
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return 0;
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}
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uint8_t at86rf215_OFDM_get_option(at86rf215_t *dev)
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{
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return 1 + (at86rf215_reg_read(dev, dev->BBC->RG_OFDMC) & OFDMC_OPT_MASK);
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}
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