mirror of
https://github.com/RIOT-OS/RIOT.git
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449 lines
11 KiB
C
449 lines
11 KiB
C
/*
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* Copyright (C) 2019 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup drivers_at86rf215
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* @{
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*
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* @file
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* @brief Getter and setter functions for the AT86RF215 driver
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*
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* @author Benjamin Valentin <benjamin.valentin@ml-pa.com>
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* @}
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*/
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#include <string.h>
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#include "at86rf215.h"
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#include "at86rf215_internal.h"
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#include "periph/spi.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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/* we can still go +3 dBm higher by increasing PA current */
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#define PAC_DBM_MIN (-31) /* dBm */
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uint16_t at86rf215_get_addr_short(const at86rf215_t *dev, uint8_t filter)
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{
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if (filter > 3) {
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return 0;
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}
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/* Each frame filter has a 2 byte short addr + 2 byte PAN ID, so we have to
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skip 4 bytes per filter */
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return ntohs(at86rf215_reg_read16(dev, dev->BBC->RG_MACSHA0F0 + (4 * filter)));
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}
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void at86rf215_set_addr_short(at86rf215_t *dev, uint8_t filter, uint16_t addr)
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{
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/* do not overwrite node address for filters other than 0 */
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if (filter == 0) {
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dev->netdev.short_addr[0] = (uint8_t)(addr);
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dev->netdev.short_addr[1] = (uint8_t)(addr >> 8);
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}
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if (filter > 3) {
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return;
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}
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at86rf215_reg_write16(dev, dev->BBC->RG_MACSHA0F0 + (4 * filter), htons(addr));
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}
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bool at86rf215_get_framefilter_enabled(at86rf215_t *dev, uint8_t filter)
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{
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return (at86rf215_reg_read(dev, dev->BBC->RG_AFC0) >> (AFC0_AFEN0_SHIFT + filter)) & 1;
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}
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void at86rf215_enable_framefilter(at86rf215_t *dev, uint8_t filter)
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{
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at86rf215_reg_or(dev, dev->BBC->RG_AFC0, 1 << (AFC0_AFEN0_SHIFT + filter));
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}
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void at86rf215_disable_framefilter(at86rf215_t *dev, uint8_t filter)
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{
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at86rf215_reg_and(dev, dev->BBC->RG_AFC0, 1 << (AFC0_AFEN0_SHIFT + filter));
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}
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uint64_t at86rf215_get_addr_long(const at86rf215_t *dev)
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{
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uint64_t addr;
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at86rf215_reg_read_bytes(dev, dev->BBC->RG_MACEA0, &addr, sizeof(addr));
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return addr;
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}
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void at86rf215_set_addr_long(at86rf215_t *dev, uint64_t addr)
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{
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memcpy(dev->netdev.long_addr, &addr, sizeof(addr));
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addr = ntohll(addr);
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at86rf215_reg_write_bytes(dev, dev->BBC->RG_MACEA0, &addr, sizeof(addr));
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}
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uint8_t at86rf215_get_chan(const at86rf215_t *dev)
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{
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return at86rf215_reg_read16(dev, dev->RF->RG_CNL);
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}
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void at86rf215_set_trim(at86rf215_t *dev, uint8_t trim)
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{
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assert(trim <= 0xF);
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at86rf215_reg_write(dev, RG_RF_XOC, trim | XOC_FS_MASK);
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}
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void at86rf215_set_clock_output(at86rf215_t *dev,
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at86rf215_clko_cur_t cur, at86rf215_clko_freq_t freq)
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{
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at86rf215_reg_write(dev, RG_RF_CLKO, cur | freq);
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}
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void at86rf215_set_chan(at86rf215_t *dev, uint16_t channel)
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{
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at86rf215_await_state_end(dev, RF_STATE_TX);
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uint8_t old_state = at86rf215_get_rf_state(dev);
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/* frequency has to be updated in TRXOFF or TXPREP (datatsheet: 6.3.2) */
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if (old_state == RF_STATE_RX) {
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at86rf215_rf_cmd(dev, CMD_RF_TXPREP);
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}
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at86rf215_reg_write16(dev, dev->RF->RG_CNL, channel);
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dev->netdev.chan = channel;
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/* enable the radio again */
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if (old_state == RF_STATE_RX) {
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at86rf215_rf_cmd(dev, old_state);
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}
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}
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uint16_t at86rf215_get_channel_spacing(at86rf215_t *dev) {
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/* 25 kHz resolution */
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return 25 * at86rf215_reg_read(dev, dev->RF->RG_CS);
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}
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uint8_t at86rf215_get_phy_mode(at86rf215_t *dev)
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{
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switch (at86rf215_reg_read(dev, dev->BBC->RG_PC) & PC_PT_MASK) {
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case 0x1: return IEEE802154_PHY_MR_FSK;
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case 0x2: return IEEE802154_PHY_MR_OFDM;
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case 0x3: return at86rf215_OQPSK_is_legacy(dev)
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? IEEE802154_PHY_OQPSK
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: IEEE802154_PHY_MR_OQPSK;
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default: return IEEE802154_PHY_DISABLED;
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}
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}
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uint16_t at86rf215_get_pan(const at86rf215_t *dev, uint8_t filter)
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{
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if (filter > 3) {
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return 0;
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}
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return at86rf215_reg_read16(dev, dev->BBC->RG_MACPID0F0 + (4 * filter));
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}
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void at86rf215_set_pan(at86rf215_t *dev, uint8_t filter, uint16_t pan)
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{
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if (filter == 0) {
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dev->netdev.pan = pan;
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}
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if (filter > 3) {
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return;
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}
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at86rf215_reg_write16(dev, dev->BBC->RG_MACPID0F0 + (4 * filter), pan);
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}
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// TODO: take modulation into account
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int16_t at86rf215_get_txpower(const at86rf215_t *dev)
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{
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uint8_t pac = at86rf215_reg_read(dev, dev->RF->RG_PAC);
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/* almost linear, each PACUR step adds ~1 dBm */
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return PAC_DBM_MIN + (pac & PAC_TXPWR_MASK) +
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((pac & PAC_PACUR_MASK) >> PAC_PACUR_SHIFT);
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}
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// TODO: take modulation into account
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void at86rf215_set_txpower(const at86rf215_t *dev, int16_t txpower)
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{
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uint8_t pacur = 0;
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txpower -= PAC_DBM_MIN;
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if (txpower < 0) {
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txpower = 0;
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}
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if (txpower > PAC_TXPWR_MASK) {
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switch (txpower - PAC_TXPWR_MASK) {
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case 1:
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pacur = 1 << PAC_PACUR_SHIFT;
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break;
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case 2:
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pacur = 2 << PAC_PACUR_SHIFT;
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break;
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default:
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pacur = 3 << PAC_PACUR_SHIFT;
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break;
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}
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txpower = PAC_TXPWR_MASK;
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}
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at86rf215_reg_write(dev, dev->RF->RG_PAC, pacur | txpower);
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}
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int8_t at86rf215_get_cca_threshold(const at86rf215_t *dev)
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{
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return dev->csma_ed;
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}
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void at86rf215_set_cca_threshold(at86rf215_t *dev, int8_t value)
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{
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dev->csma_ed = value;
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at86rf215_reg_write(dev, dev->BBC->RG_AMEDT, value);
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}
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int8_t at86rf215_get_ed_level(at86rf215_t *dev)
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{
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return at86rf215_reg_read(dev, dev->RF->RG_EDV);
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}
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void at86rf215_enable_rpc(at86rf215_t *dev)
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{
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if (!(dev->flags & AT86RF215_OPT_RPC) || !CONFIG_AT86RF215_RPC_EN) {
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return;
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}
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/* no Reduced Power mode available for OFDM */
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#ifdef MODULE_NETDEV_IEEE802154_MR_FSK
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if (dev->fsk_pl) {
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/* MR-FSK */
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at86rf215_reg_or(dev, dev->BBC->RG_FSKRPC, FSKRPC_EN_MASK);
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return;
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}
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#endif
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#ifdef MODULE_NETDEV_IEEE802154_MR_OQPSK
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{
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/* MR-O-QPSK */
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at86rf215_reg_or(dev, dev->BBC->RG_OQPSKC2, OQPSKC2_RPC_MASK);
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}
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#endif
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}
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void at86rf215_disable_rpc(at86rf215_t *dev)
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{
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if (!(dev->flags & AT86RF215_OPT_RPC) || !CONFIG_AT86RF215_RPC_EN) {
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return;
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}
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/* no Reduced Power mode available for OFDM */
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#ifdef MODULE_NETDEV_IEEE802154_MR_FSK
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if (dev->fsk_pl) {
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/* MR-FSK */
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at86rf215_reg_and(dev, dev->BBC->RG_FSKRPC, ~FSKRPC_EN_MASK);
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return;
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}
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#endif
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#ifdef MODULE_NETDEV_IEEE802154_MR_OQPSK
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{
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/* MR-O-QPSK */
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at86rf215_reg_and(dev, dev->BBC->RG_OQPSKC2, ~OQPSKC2_RPC_MASK);
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}
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#endif
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}
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void at86rf215_set_option(at86rf215_t *dev, uint16_t option, bool state)
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{
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/* set option field */
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dev->flags = (state) ? (dev->flags | option)
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: (dev->flags & ~option);
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switch (option) {
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case AT86RF215_OPT_PROMISCUOUS:
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if (state) {
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at86rf215_reg_or(dev, dev->BBC->RG_AFC0, AFC0_PM_MASK);
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} else {
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at86rf215_reg_and(dev, dev->BBC->RG_AFC0, ~AFC0_PM_MASK);
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}
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break;
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case AT86RF215_OPT_AUTOACK:
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if (state) {
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at86rf215_reg_or(dev, dev->BBC->RG_AMCS, AMCS_AACK_MASK);
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} else {
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at86rf215_reg_and(dev, dev->BBC->RG_AMCS, ~AMCS_AACK_MASK);
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}
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break;
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case AT86RF215_OPT_CCATX:
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if (state){
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at86rf215_reg_or(dev, dev->BBC->RG_AMCS, AMCS_CCATX_MASK);
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} else {
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at86rf215_reg_and(dev, dev->BBC->RG_AMCS, ~AMCS_CCATX_MASK);
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}
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break;
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case AT86RF215_OPT_RPC:
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if (state) {
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at86rf215_enable_rpc(dev);
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} else {
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at86rf215_disable_rpc(dev);
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}
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break;
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default:
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/* do nothing */
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break;
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}
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}
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static void _wake_from_sleep(at86rf215_t *dev)
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{
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/* wake the transceiver */
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at86rf215_rf_cmd(dev, CMD_RF_TRXOFF);
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at86rf215_await_state(dev, RF_STATE_TRXOFF);
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/* config is lost after SLEEP */
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at86rf215_reset(dev);
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/* if both transceivers were sleeping, the chip entered DEEP_SLEEP.
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Waking one device in that mode wakes the other one too. */
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if (dev->sibling && dev->sibling->state == AT86RF215_STATE_SLEEP) {
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at86rf215_rf_cmd(dev->sibling, CMD_RF_SLEEP);
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}
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}
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bool at86rf215_set_rx_from_idle(at86rf215_t *dev, uint8_t *state)
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{
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if (dev->state == AT86RF215_STATE_SLEEP) {
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_wake_from_sleep(dev);
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}
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uint8_t s;
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while ((s = at86rf215_get_rf_state(dev)) == RF_STATE_TRANSITION) {}
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if (state) {
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*state = s;
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}
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if (s == RF_STATE_RESET) {
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at86rf215_rf_cmd(dev, CMD_RF_TRXOFF);
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at86rf215_await_state(dev, RF_STATE_TRXOFF);
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s = RF_STATE_TRXOFF;
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}
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if (s == RF_STATE_TRXOFF) {
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at86rf215_rf_cmd(dev, CMD_RF_RX);
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at86rf215_await_state(dev, RF_STATE_RX);
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s = RF_STATE_RX;
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}
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if (s == RF_STATE_RX) {
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return true;
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}
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return false;
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}
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bool at86rf215_set_idle_from_rx(at86rf215_t *dev, uint8_t state)
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{
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if (state == RF_STATE_TX || state == CMD_RF_TXPREP) {
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return false;
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}
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if (dev->state == AT86RF215_STATE_SLEEP) {
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if (state == CMD_RF_SLEEP) {
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return true;
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}
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_wake_from_sleep(dev);
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}
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uint8_t s;
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while ((s = at86rf215_get_rf_state(dev)) == RF_STATE_TRANSITION) {}
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if (s != RF_STATE_RX) {
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return false;
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}
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if (state == RF_STATE_RX) {
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return true;
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}
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at86rf215_rf_cmd(dev, CMD_RF_TRXOFF);
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at86rf215_await_state(dev, RF_STATE_TRXOFF);
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if (state == RF_STATE_TRXOFF) {
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return true;
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}
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/* clear IRQ */
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at86rf215_reg_read(dev, dev->BBC->RG_IRQS);
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at86rf215_reg_read(dev, dev->RF->RG_IRQS);
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at86rf215_rf_cmd(dev, CMD_RF_SLEEP);
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dev->state = AT86RF215_STATE_SLEEP;
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if (state == RF_STATE_RESET) {
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return true;
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}
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return false;
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}
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int at86rf215_enable_batmon(at86rf215_t *dev, unsigned voltage)
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{
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uint8_t bmdvc;
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/* only configure BATMON on one interface */
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if (!is_subGHz(dev) && dev->sibling != NULL) {
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dev = dev->sibling;
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}
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/* ensure valid range */
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if (voltage < 1700 || voltage > 3675) {
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return -ERANGE;
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}
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if (voltage > 2500) {
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/* high range */
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bmdvc = (voltage - 2550 + 37) / 75;
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DEBUG("[at86rf215] BATMON set to %u mV\n", 2550 + 75 * bmdvc);
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bmdvc |= BMDVC_BMHR_MASK;
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} else {
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/* low range */
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bmdvc = (voltage - 1700 + 25) / 50;
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DEBUG("[at86rf215] BATMON set to %u mV\n", 1700 + 50 * bmdvc);
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}
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/* set batmon threshold */
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at86rf215_reg_write(dev, RG_RF_BMDVC, bmdvc);
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/* enable interrupt */
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at86rf215_reg_or(dev, dev->RF->RG_IRQM, RF_IRQ_BATLOW);
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return 0;
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}
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void at86rf215_disable_batmon(at86rf215_t *dev)
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{
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/* only configure BATMON on one interface */
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if (!is_subGHz(dev) && dev->sibling != NULL) {
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dev = dev->sibling;
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}
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/* disable interrupt */
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at86rf215_reg_and(dev, dev->RF->RG_IRQM, ~RF_IRQ_BATLOW);
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}
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