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170 lines
4.1 KiB
C
170 lines
4.1 KiB
C
/*
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* Copyright (C) 2014-2017 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_stm32
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* @ingroup drivers_periph_adc
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* @{
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*
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* @file
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* @brief Low-level ADC driver implementation
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*
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* @author Aurélien Fillau <aurelien.fillau@we-sens.com>
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*
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* @}
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*/
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#include "cpu.h"
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#include "mutex.h"
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#include "periph/adc.h"
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/**
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* @brief Allocate locks for all three available ADC device
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*
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* All STM32L0 CPUs we support so far only come with a single ADC device.
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*/
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static mutex_t lock = MUTEX_INIT;
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static inline void prep(void)
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{
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mutex_lock(&lock);
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periph_clk_en(APB2, RCC_APB2ENR_ADCEN);
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}
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static inline void done(void)
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{
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periph_clk_dis(APB2, RCC_APB2ENR_ADCEN);
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mutex_unlock(&lock);
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}
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static void _enable_adc(void)
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{
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if ((ADC1->CR & ADC_CR_ADEN) != 0) {
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ADC1->CR |= ADC_CR_ADDIS;
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while(ADC1->CR & ADC_CR_ADEN) {} /* Wait for ADC disabled */
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}
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if ((ADC1->CR & ADC_CR_ADEN) == 0) {
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/* Then, start a calibration */
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ADC1->CR |= ADC_CR_ADCAL;
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while(ADC1->CR & ADC_CR_ADCAL) {} /* Wait for the end of calibration */
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}
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/* Clear flag */
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ADC1->ISR |= ADC_ISR_ADRDY;
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/* enable device */
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ADC1->CR = ADC_CR_ADVREGEN | ADC_CR_ADEN;
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/* Wait for ADC to be ready */
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while (!(ADC1->ISR & ADC_ISR_ADRDY)) {}
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}
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static void _disable_adc(void)
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{
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/* Disable ADC */
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if ((ADC1->CR & ADC_CR_ADEN) != 0) {
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ADC1->CR |= ADC_CR_ADDIS;
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while(ADC1->CR & ADC_CR_ADEN) {} /* Wait for ADC disabled */
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/* Disable Voltage regulator */
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ADC1->CR = 0;
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ADC1->ISR = 0;
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}
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}
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int adc_init(adc_t line)
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{
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/* make sure the given line is valid */
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if (line >= ADC_NUMOF) {
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return -1;
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}
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/* lock and power on the device */
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prep();
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if ((adc_config[line].chan != 17) && (adc_config[line].chan != 18)) {
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/* configure the pin */
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gpio_init_analog(adc_config[line].pin);
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}
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/* no watchdog, no discontinuous mode, no auto off, single conv, no trigger,
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* right align, 12bits, no dma, no wait */
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ADC1->CFGR1 = 0;
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/* no oversampling: Watch out, MSB (CKMODE) MUST not be changed while on
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* (it is zero by default) */
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ADC1->CFGR2 = 0;
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/* activate VREF, and set prescaler to 4 (4Mhz clock)
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* activate also temp sensor, so that it will be ready for temp measure */
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ADC->CCR = ADC_CCR_VREFEN | ADC_CCR_TSEN | ADC_CCR_PRESC_1;
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/* Sampling time selection: 7 => 160 clocks => 40µs @ 4MHz
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* (must be 10+10 for ref start and sampling time) */
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ADC1->SMPR |= ADC_SMPR_SMP;
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/* clear previous flag */
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ADC1->ISR |= ADC_ISR_EOC;
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/* power off an release device for now */
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done();
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return 0;
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}
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int32_t adc_sample(adc_t line, adc_res_t res)
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{
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int sample;
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/* check if resolution is applicable */
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if ( (res != ADC_RES_6BIT) &&
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(res != ADC_RES_8BIT) &&
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(res != ADC_RES_10BIT) &&
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(res != ADC_RES_12BIT)) {
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return -1;
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}
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/* lock and power on the ADC device */
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prep();
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/* Enable ADC */
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_enable_adc();
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/* Reactivate VREFINT and temperature sensor if necessary */
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if (adc_config[line].chan == 17) {
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ADC->CCR |= ADC_CCR_VREFEN;
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}
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else if (adc_config[line].chan == 18) {
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ADC->CCR |= ADC_CCR_TSEN;
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}
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/* else nothing */
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/* set resolution and channel */
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ADC1->CFGR1 &= ~ADC_CFGR1_RES;
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ADC1->CFGR1 |= res & ADC_CFGR1_RES;
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ADC1->CHSELR = (1 << adc_config[line].chan);
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/* clear flag */
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ADC1->ISR |= ADC_ISR_EOC;
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/* start conversion and wait for results */
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ADC1->CR |= ADC_CR_ADSTART;
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while (!(ADC1->ISR & ADC_ISR_EOC)) {}
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/* read result */
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sample = (int)ADC1->DR;
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/* Disable ADC */
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_disable_adc();
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/* Deactivate VREFINT and temperature sensor to save power */
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ADC->CCR &= ~(ADC_CCR_VREFEN | ADC_CCR_TSEN);
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/* unlock and power off device again */
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done();
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return sample;
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}
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