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https://github.com/RIOT-OS/RIOT.git
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0dfd83938f
For `gpio_ll_print_conf()` we need to include `<stdio.h>`, when not using `fmt.h`.
177 lines
4.5 KiB
C
177 lines
4.5 KiB
C
/*
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* Copyright (C) 2023 Gunar Schorcht <gunar@schorcht.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup cpu_gd32v
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* @ingroup drivers_periph_gpio_ll
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* @{
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*
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* @file
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* @brief GPIO Low-level API implementation for the GD32V GPIO peripheral
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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* @}
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*/
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#include <errno.h>
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#include "cpu.h"
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#include "bitarithm.h"
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#include "periph/gpio_ll.h"
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#define ENABLE_DEBUG 0
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#include "debug.h"
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#ifdef MODULE_FMT
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# include "fmt.h"
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#else
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# include <stdio.h>
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static inline void print_str(const char *str)
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{
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fputs(str, stdout);
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}
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#endif
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uint16_t pin_used[GPIO_PORT_NUMOF] = {};
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int gpio_ll_init(gpio_port_t port, uint8_t pin, gpio_conf_t conf)
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{
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if ((conf.pull == GPIO_PULL_KEEP) ||
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(conf.state == GPIO_OUTPUT_OPEN_SOURCE) ||
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((conf.state != GPIO_INPUT) && (conf.pull != GPIO_FLOATING))) {
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return -ENOTSUP;
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}
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unsigned state = irq_disable();
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periph_clk_en(APB2, (RCU_APB2EN_PAEN_Msk << gpio_port_num(port)));
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volatile uint32_t *ctrl = (pin < 8) ? &((GPIO_Type *)port)->CTL0
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: &((GPIO_Type *)port)->CTL1;
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volatile uint32_t *octl = &((GPIO_Type *)port)->OCTL;
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unsigned pos = ((pin % 8) * 4);
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/* reset configuration CTLx[1:0], MDx[1:0] (analogue, input mode) */
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*ctrl &= ~(0xf << pos);
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switch (conf.state) {
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case GPIO_DISCONNECT:
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pin_used[gpio_port_num(port)] &= ~(1 << pin);
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if (pin_used[gpio_port_num(port)] == 0) {
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periph_clk_dis(APB2, (RCU_APB2EN_PAEN_Msk << gpio_port_num(port)));
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}
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break;
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case GPIO_INPUT:
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pin_used[gpio_port_num(port)] |= 1 << pin;
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if (conf.pull == GPIO_FLOATING) {
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*ctrl |= 0x1 << (pos + 2);
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}
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else {
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*ctrl |= 0x2 << (pos + 2);
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if (conf.pull == GPIO_PULL_UP) {
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*octl |= 1 << pin;
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}
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else {
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*octl &= ~(1 << pin);
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}
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}
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break;
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case GPIO_OUTPUT_PUSH_PULL:
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case GPIO_OUTPUT_OPEN_DRAIN:
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pin_used[gpio_port_num(port)] |= 1 << pin;
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*ctrl |= (conf.slew_rate + 1) << pos;
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*ctrl |= (conf.state == GPIO_OUTPUT_OPEN_DRAIN ? 0x1 : 0x0) << (pos + 2);
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if (conf.initial_value) {
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gpio_ll_set(port, 1UL << pin);
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}
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else {
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gpio_ll_clear(port, 1UL << pin);
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}
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break;
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default:
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irq_restore(state);
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return -ENOTSUP;
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}
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irq_restore(state);
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return 0;
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}
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gpio_conf_t gpio_ll_query_conf(gpio_port_t port, uint8_t pin)
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{
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gpio_conf_t result = { 0 };
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unsigned state = irq_disable();
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volatile uint32_t *ctrl_reg = (pin < 8) ? &((GPIO_Type *)port)->CTL0
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: &((GPIO_Type *)port)->CTL1;
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unsigned pos = ((pin % 8) * 4);
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uint32_t mode = (*ctrl_reg >> pos) & 0x3;
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uint32_t ctrl = (*ctrl_reg >> (pos + 2)) & 0x3;
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if (mode == 0) {
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result.state = GPIO_INPUT;
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switch (ctrl) {
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case 0:
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result.state = GPIO_DISCONNECT;
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break;
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case 1:
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result.pull = GPIO_FLOATING;
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break;
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case 2:
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result.pull = (((GPIO_Type *)port)->OCTL & (1UL << pin)) ? GPIO_PULL_UP
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: GPIO_PULL_DOWN;
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break;
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default:
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break;
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}
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}
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else {
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result.slew_rate = mode - 1;
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result.pull = GPIO_FLOATING;
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switch (ctrl) {
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case 0:
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result.state = GPIO_OUTPUT_PUSH_PULL;
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break;
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case 1:
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result.state = GPIO_OUTPUT_OPEN_DRAIN;
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break;
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default:
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result.state = GPIO_USED_BY_PERIPHERAL;
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break;
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}
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}
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if (result.state == GPIO_INPUT) {
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result.initial_value = (gpio_ll_read(port) >> pin) & 1UL;
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}
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else {
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result.initial_value = (gpio_ll_read_output(port) >> pin) & 1UL;
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}
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irq_restore(state);
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return result;
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}
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void gpio_ll_print_conf(gpio_conf_t conf)
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{
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static const char *slew_strs[] = {
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[GPIO_SLEW_SLOWEST] = "slowest",
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[GPIO_SLEW_SLOW] = "medium",
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[GPIO_SLEW_FASTEST] = "fastest",
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"invalid"
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};
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gpio_ll_print_conf_common(conf);
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print_str(", slew: ");
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print_str(slew_strs[conf.slew_rate]);
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}
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