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36e8526046
The API was based on the assumption that GPIO ports are mapped in memory
sanely, so that a `GPIO_PORT(num)` macro would work allow for constant
folding when `num` is known and still be efficient when it is not.
Some MCUs, however, will need a look up tables to efficiently translate
GPIO port numbers to the port's base address. This will prevent the use
of such a `GPIO_PORT(num)` macro in constant initializers.
As a result, we rather provide `GPIO_PORT_0`, `GPIO_PORT_1`, etc. macros
for each GPIO port present (regardless of MCU naming scheme), as well as
`GPIO_PORT_A`, `GPIO_PORT_B`, etc. macros if (and only if) the MCU port
naming scheme uses letters rather than numbers.
These can be defined as macros to the peripheral base address even when
those are randomly mapped into the address space. In addition, a C
function `gpio_port()` replaces the role of the `GPIO_PORT()` and
`gpio_port_num()` the `GPIO_PORT_NUM()` macro. Those functions will
still be implemented as efficient as possible and will allow constant
folding where it was formerly possible. Hence, there is no downside for
MCUs with sane peripheral memory mapping, but it is highly beneficial
for the crazy ones.
There are also two benefits for the non-crazy MCUs:
1. We can now test for valid port numbers with `#ifdef GPIO_PORT_<NUM>`
- This directly benefits the test in `tests/periph/gpio_ll`, which
can now provide a valid GPIO port for each and every board
- Writing to invalid memory mapped I/O addresses was treated as
triggering undefined behavior by the compiler and used as a
optimization opportunity
2. We can now detect at compile time if the naming scheme of the MCU
uses letters or numbers, and produce more user friendly output.
- This is directly applied in the test app
170 lines
3.1 KiB
C
170 lines
3.1 KiB
C
/*
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* Copyright (C) 2023 Gunar Schorcht <gunar@schorcht.net>
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup cpu_gd32v
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* @ingroup drivers_periph_gpio_ll
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* @{
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*
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* @file
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* @brief GPIO Low-level API implementation for the GD32V GPIO peripheral
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*
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* @author Gunar Schorcht <gunar@schorcht.net>
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*/
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#ifndef GPIO_LL_ARCH_H
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#define GPIO_LL_ARCH_H
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#include "architecture.h"
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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#ifndef DOXYGEN /* hide implementation specific details from Doxygen */
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/**
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* @brief Number of ports available on GD32VF103
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*/
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#define GPIO_PORT_NUMOF 5
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#define GPIO_PORT_NUMBERING_ALPHABETIC 1
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#ifdef GPIOA_BASE
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# define GPIO_PORT_0 GPIOA_BASE
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#endif
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#ifdef GPIOB_BASE
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# define GPIO_PORT_1 GPIOB_BASE
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#endif
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#ifdef GPIOC_BASE
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# define GPIO_PORT_2 GPIOC_BASE
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#endif
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#ifdef GPIOD_BASE
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# define GPIO_PORT_3 GPIOD_BASE
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#endif
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#ifdef GPIOE_BASE
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# define GPIO_PORT_4 GPIOE_BASE
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#endif
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#ifdef GPIOF_BASE
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# define GPIO_PORT_5 GPIOF_BASE
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#endif
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#ifdef GPIOG_BASE
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# define GPIO_PORT_6 GPIOG_BASE
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#endif
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#ifdef GPIOH_BASE
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# define GPIO_PORT_7 GPIOH_BASE
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#endif
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#ifdef GPIOI_BASE
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# define GPIO_PORT_8 GPIOI_BASE
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#endif
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#ifdef GPIOJ_BASE
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# define GPIO_PORT_9 GPIOJ_BASE
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#endif
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#ifdef GPIOK_BASE
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# define GPIO_PORT_10 GPIOK_BASE
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#endif
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static inline gpio_port_t gpio_port(uword_t num)
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{
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#if defined(CPU_FAM_STM32MP1)
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return GPIOA_BASE + (num << 12);
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#else
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return GPIOA_BASE + (num << 10);
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#endif
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}
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static inline uword_t gpio_port_num(gpio_port_t port)
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{
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#if defined(CPU_FAM_STM32MP1)
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return (port - GPIOA_BASE) >> 12;
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#else
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return (port - GPIOA_BASE) >> 10;
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#endif
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}
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static inline uword_t gpio_ll_read(gpio_port_t port)
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{
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return ((GPIO_Type *)port)->ISTAT;
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}
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static inline uword_t gpio_ll_read_output(gpio_port_t port)
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{
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return ((GPIO_Type *)port)->OCTL;
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}
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static inline void gpio_ll_set(gpio_port_t port, uword_t mask)
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{
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((GPIO_Type *)port)->BOP = mask;
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}
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static inline void gpio_ll_clear(gpio_port_t port, uword_t mask)
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{
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((GPIO_Type *)port)->BOP = mask << 16;
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}
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static inline void gpio_ll_toggle(gpio_port_t port, uword_t mask)
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{
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unsigned irq_state = irq_disable();
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((GPIO_Type *)port)->OCTL ^= mask;
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irq_restore(irq_state);
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}
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static inline void gpio_ll_write(gpio_port_t port, uword_t value)
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{
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((GPIO_Type *)port)->OCTL = value;
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}
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static inline gpio_port_t gpio_get_port(gpio_t pin)
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{
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return pin & 0xfffffff0UL;
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}
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static inline uint8_t gpio_get_pin_num(gpio_t pin)
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{
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return pin & 0xfUL;
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}
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static inline gpio_port_t gpio_port_pack_addr(void *addr)
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{
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return (gpio_port_t)addr;
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}
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static inline void * gpio_port_unpack_addr(gpio_port_t port)
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{
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if (port < GPIOA_BASE) {
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return (void *)port;
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}
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return NULL;
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}
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static inline bool is_gpio_port_num_valid(uint_fast8_t num)
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{
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return num < GPIO_PORT_NUMOF;
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}
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#endif /* DOXYGEN */
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#ifdef __cplusplus
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}
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#endif
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#endif /* GPIO_LL_ARCH_H */
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/** @} */
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