mirror of
https://github.com/RIOT-OS/RIOT.git
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c41342dc5b
while keeping a sane (rtt shared with rtc (counter)) default this commit adds the ability to define RTT_FREQUENCY to some thing different than 1 Hz
187 lines
3.7 KiB
C
187 lines
3.7 KiB
C
/*
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* Copyright (C) 2015-2020 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_slstk3400a
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for the SLSTK3400A starter kit
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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* @author Bas Stottelaar <basstottelaar@gmail.com>
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* @author Akshai M <mail@akshaim.in>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "cpu.h"
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#include "periph_cpu.h"
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#include "em_cmu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Clock configuration
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* @{
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*/
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#ifndef CLOCK_HF
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#define CLOCK_HF cmuSelect_HFXO
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#endif
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#ifndef CLOCK_CORE_DIV
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#define CLOCK_CORE_DIV cmuClkDiv_1
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#endif
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#ifndef CLOCK_LFA
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#define CLOCK_LFA cmuSelect_LFXO
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#endif
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#ifndef CLOCK_LFB
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#define CLOCK_LFB cmuSelect_LFXO
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#endif
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/** @} */
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/**
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* @name ADC configuration
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* @{
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*/
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static const adc_conf_t adc_config[] = {
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{
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.dev = ADC0,
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.cmu = cmuClock_ADC0,
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}
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};
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static const adc_chan_conf_t adc_channel_config[] = {
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{
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.dev = 0,
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.input = adcSingleInputTemp,
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.reference = adcRef1V25,
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.acq_time = adcAcqTime8
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},
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{
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.dev = 0,
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.input = adcSingleInputVDDDiv3,
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.reference = adcRef1V25,
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.acq_time = adcAcqTime8
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}
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};
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#define ADC_DEV_NUMOF ARRAY_SIZE(adc_config)
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#define ADC_NUMOF ARRAY_SIZE(adc_channel_config)
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = I2C0,
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.sda_pin = GPIO_PIN(PD, 6),
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.scl_pin = GPIO_PIN(PD, 7),
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.loc = I2C_ROUTE_LOCATION_LOC1,
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.cmu = cmuClock_I2C0,
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.irq = I2C0_IRQn,
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.speed = I2C_SPEED_NORMAL
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}
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};
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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#define I2C_0_ISR isr_i2c0
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#ifndef RTT_FREQUENCY
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#define RTT_FREQUENCY (1U) /* in Hz */
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#endif
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_dev_t spi_config[] = {
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{
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.dev = USART0,
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.mosi_pin = GPIO_PIN(PE, 10),
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.miso_pin = GPIO_PIN(PE, 11),
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.clk_pin = GPIO_PIN(PE, 12),
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.loc = USART_ROUTE_LOCATION_LOC0,
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.cmu = cmuClock_USART0,
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.irq = USART0_RX_IRQn
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}
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name Timer configuration
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*
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* The implementation uses two timers in cascade mode.
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* @{
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*/
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static const timer_conf_t timer_config[] = {
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{
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.prescaler = {
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.dev = TIMER0,
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.cmu = cmuClock_TIMER0
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},
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.timer = {
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.dev = TIMER1,
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.cmu = cmuClock_TIMER1
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},
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.irq = TIMER1_IRQn,
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.channel_numof = 3
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}
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};
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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#define TIMER_0_ISR isr_timer1
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.dev = USART1,
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.rx_pin = GPIO_PIN(PA, 0),
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.tx_pin = GPIO_PIN(PF, 2),
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.loc = USART_ROUTE_LOCATION_LOC4,
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.cmu = cmuClock_USART1,
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.irq = USART1_RX_IRQn
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},
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{
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.dev = LEUART0,
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.rx_pin = GPIO_PIN(PD, 5),
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.tx_pin = GPIO_PIN(PD, 4),
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.loc = LEUART_ROUTE_LOCATION_LOC0,
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.cmu = cmuClock_LEUART0,
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.irq = LEUART0_IRQn
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}
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};
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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#define UART_0_ISR_RX isr_usart1_rx
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#define UART_1_ISR_RX isr_leuart0
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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