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91 lines
1.6 KiB
C
91 lines
1.6 KiB
C
/*
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* Copyright (C) 2017 Ken Rabold
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* 2019 Inria
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @ingroup boards_hifive1
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* @{
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*
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* @file
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* @brief Peripheral specific definitions for the HiFive1 RISC-V board
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*
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* @author Ken Rabold
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#include "clk_conf.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Timer configuration
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*
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* @{
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*/
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#define TIMER_NUMOF (1)
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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{
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.addr = UART0_CTRL_ADDR,
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.rx = GPIO_PIN(0, 16),
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.tx = GPIO_PIN(0, 17),
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.isr_num = INT_UART0_BASE,
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},
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{
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.addr = UART1_CTRL_ADDR,
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.rx = GPIO_PIN(0, 18),
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.tx = GPIO_PIN(0, 23),
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.isr_num = INT_UART1_BASE,
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},
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};
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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/**
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* @name SPI device configuration
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*
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{
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.addr = SPI1_CTRL_ADDR,
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.mosi = GPIO_PIN(0, 3), /* D11 */
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.miso = GPIO_PIN(0, 4), /* D12 */
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.sclk = GPIO_PIN(0, 5), /* D13 */
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},
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name PWM configuration
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*
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* @{
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*/
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#define PWM_NUMOF (3)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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