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Many MCUs contain some Backup or Low Power SRAM that is retained'even in the deepest sleep modes. In such sleep modes the MCU is essentually turned off with only the RTC still running. It can be woken by a GPIO or a RTC alarm. When this happens, a reset is triggered and the normal startup routine is invoked. This adds bss & data section for this memory in the linker script. This allows for structures to be placed in it e.g.: e.g.: static uint8_t persistent_buffer[64] __attribute__((section(".backup.bss"))); static uint32_t persistent_counter __attribute__((section(".backup.data"))) = 1234; |
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cortexm_base.ld | ||
cortexm_rom_offset.ld | ||
cortexm.ld |