mirror of
https://github.com/RIOT-OS/RIOT.git
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a819fd6474
- fixed gpio driver - fixed uart driver
412 lines
10 KiB
C
412 lines
10 KiB
C
/*
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* Copyright (C) 2014 Freie Universität Berlin
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup driver_periph
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* @{
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*
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* @file
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* @brief Low-level UART driver implementation
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*
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* @author Hauke Petersen <hauke.petersen@fu-berlin.de>
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*
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* @}
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*/
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#include "board.h"
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#include "cpu.h"
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#include "sched.h"
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#include "thread.h"
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#include "periph/uart.h"
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#include "periph_conf.h"
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#define ENABLE_DEBUG (0)
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#include "debug.h"
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/* guard file in case no UART device was specified */
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#if UART_NUMOF
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/**
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* @brief Each UART device has to store two callbacks.
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*/
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typedef struct {
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uart_rx_cb_t rx_cb;
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uart_tx_cb_t tx_cb;
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void *arg;
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} uart_conf_t;
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/**
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* @brief Allocate memory to store the callback functions.
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*/
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static uart_conf_t uart_config[UART_NUMOF];
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int uart_init(uart_t uart, uint32_t baudrate, uart_rx_cb_t rx_cb, uart_tx_cb_t tx_cb, void *arg)
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{
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/* initialize basic functionality */
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int res = uart_init_blocking(uart, baudrate);
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if (res != 0) {
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return res;
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}
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/* register callbacks */
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uart_config[uart].rx_cb = rx_cb;
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uart_config[uart].tx_cb = tx_cb;
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uart_config[uart].arg = arg;
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/* configure interrupts and enable RX interrupt */
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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NVIC_SetPriority(UART_0_IRQ, UART_IRQ_PRIO);
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NVIC_EnableIRQ(UART_0_IRQ);
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UART_0_DEV->UART_IER = UART_IER_RXRDY;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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NVIC_SetPriority(UART_1_IRQ, UART_IRQ_PRIO);
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NVIC_EnableIRQ(UART_1_IRQ);
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UART_1_DEV->US_IER = US_IER_RXRDY;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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NVIC_SetPriority(UART_2_IRQ, UART_IRQ_PRIO);
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NVIC_EnableIRQ(UART_2_IRQ);
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UART_2_DEV->US_IER = US_IER_RXRDY;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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NVIC_SetPriority(UART_3_IRQ, UART_IRQ_PRIO);
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NVIC_EnableIRQ(UART_3_IRQ);
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UART_3_DEV->US_IER = US_IER_RXRDY;
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break;
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#endif
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}
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return 0;
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}
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int uart_init_blocking(uart_t uart, uint32_t baudrate)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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/* enable uart clock */
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UART_0_CLKEN();
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/* configure PINS */
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UART_0_PORT->PIO_PDR = UART_0_PINS;
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UART_0_PORT->PIO_ABSR &= ~UART_0_PINS; /* periph function A */
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/* set clock divider */
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UART_0_DEV->UART_BRGR = (F_CPU / (16 * baudrate));
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/* set to normal mode without parity */
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UART_0_DEV->UART_MR = UART_MR_PAR_NO | UART_MR_CHMODE_NORMAL;
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/* enable receiver and transmitter and reset status bits */
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UART_0_DEV->UART_CR = UART_CR_RXEN | UART_CR_TXEN | UART_CR_RSTSTA;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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/* enable uart clock */
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UART_1_CLKEN();
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/* configure PINS */
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UART_1_PORT->PIO_PDR = UART_1_PINS;
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UART_1_PORT->PIO_ABSR &= ~UART_1_PINS; /* periph function A */
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/* set clock divider */
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UART_1_DEV->US_BRGR = (F_CPU / (16 * baudrate));
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/* set to normal mode without parity */
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UART_1_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
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/* enable receiver and transmitter and reset status bits */
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UART_1_DEV->US_CR = US_CR_RXEN | US_CR_TXEN | US_CR_RSTSTA;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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/* enable uart clock */
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UART_2_CLKEN();
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/* configure PINS */
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UART_2_PORT->PIO_PDR = UART_2_PINS;
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UART_2_PORT->PIO_ABSR &= ~UART_2_PINS; /* periph function A */
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/* set clock divider */
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UART_2_DEV->US_BRGR = (F_CPU / (16 * baudrate));
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/* set to normal mode without parity */
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UART_2_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
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/* enable receiver and transmitter and reset status bits */
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UART_2_DEV->US_CR = US_CR_RXEN | US_CR_TXEN | US_CR_RSTSTA;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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/* enable uart clock */
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UART_3_CLKEN();
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/* configure PINS */
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UART_3_PORT->PIO_PDR = UART_3_PINS;
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UART_3_PORT->PIO_ABSR |= UART_3_PINS; /* periph function B */
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/* set clock divider */
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UART_3_DEV->US_BRGR = (F_CPU / (16 * baudrate));
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/* set to normal mode without parity */
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UART_3_DEV->US_MR = US_MR_CHRL_8_BIT | US_MR_PAR_NO;
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/* enable receiver and transmitter and reset status bits */
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UART_3_DEV->US_CR = US_CR_RXEN | US_CR_TXEN | US_CR_RSTSTA;
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break;
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#endif
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}
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return 0;
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}
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void uart_tx_begin(uart_t uart)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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UART_0_DEV->UART_IER = UART_IER_TXRDY;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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UART_1_DEV->US_IER = US_IER_TXRDY;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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UART_2_DEV->US_IER = US_IER_TXRDY;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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UART_3_DEV->US_IER = US_IER_TXRDY;
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break;
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#endif
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}
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}
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int uart_write(uart_t uart, char data)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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UART_0_DEV->UART_THR = data;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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UART_1_DEV->US_THR = data;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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UART_2_DEV->US_THR = data;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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UART_3_DEV->US_THR = data;
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break;
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#endif
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}
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return 1;
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}
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int uart_read_blocking(uart_t uart, char *data)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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while (!(UART_0_DEV->UART_SR & UART_SR_RXRDY));
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*data = (char)UART_0_DEV->UART_RHR;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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while (!(UART_1_DEV->US_CSR & US_CSR_RXRDY));
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*data = (char)UART_1_DEV->US_RHR;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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while (!(UART_2_DEV->US_CSR & US_CSR_RXRDY));
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*data = (char)UART_2_DEV->US_RHR;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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while (!(UART_3_DEV->US_CSR & US_CSR_RXRDY));
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*data = (char)UART_3_DEV->US_RHR;
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break;
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#endif
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}
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return 1;
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}
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int uart_write_blocking(uart_t uart, char data)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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while (!(UART_0_DEV->UART_SR & UART_SR_TXRDY));
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UART_0_DEV->UART_THR = data;
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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while(!(UART_1_DEV->US_CSR & US_CSR_TXRDY));
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UART_1_DEV->US_THR = data;
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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while(!(UART_2_DEV->US_CSR & US_CSR_TXRDY));
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UART_2_DEV->US_THR = data;
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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while(!(UART_3_DEV->US_CSR & US_CSR_TXRDY));
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UART_3_DEV->US_THR = data;
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break;
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#endif
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}
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return 1;
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}
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void uart_poweron(uart_t uart)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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UART_0_CLKEN();
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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UART_1_CLKEN();
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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UART_2_CLKEN();
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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UART_3_CLKEN();
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break;
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#endif
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}
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}
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void uart_poweroff(uart_t uart)
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{
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switch (uart) {
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#if UART_0_EN
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case UART_0:
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UART_0_CLKDIS();
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break;
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#endif
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#if UART_1_EN
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case UART_1:
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UART_1_CLKDIS();
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break;
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#endif
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#if UART_2_EN
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case UART_2:
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UART_2_CLKDIS();
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break;
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#endif
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#if UART_3_EN
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case UART_3:
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UART_3_CLKDIS();
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break;
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#endif
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}
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}
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#if UART_0_EN
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void UART_0_ISR(void)
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{
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if (UART_0_DEV->UART_SR & UART_SR_RXRDY) {
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char data = (char)UART_0_DEV->UART_RHR;
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uart_config[UART_0].rx_cb(uart_config[UART_0].arg, data);
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}
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if ((UART_0_DEV->UART_SR & UART_SR_TXRDY) && (UART_0_DEV->UART_IMR & UART_IMR_TXRDY)) {
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if (uart_config[UART_0].tx_cb(uart_config[UART_0].arg) == 0) {
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UART_0_DEV->UART_IDR = UART_IDR_TXRDY;
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}
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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#endif
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#if UART_1_EN
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void UART_1_ISR(void)
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{
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if (UART_1_DEV->US_CSR & US_CSR_RXRDY) {
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char data = (char)UART_1_DEV->US_RHR;
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uart_config[UART_1].rx_cb(uart_config[UART_1].arg, data);
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}
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if ((UART_1_DEV->US_CSR & US_CSR_TXRDY) && (UART_1_DEV->US_IMR & US_IMR_TXRDY)) {
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if (uart_config[UART_1].tx_cb(uart_config[UART_1].arg) == 0) {
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UART_1_DEV->US_IDR = US_IDR_TXRDY;
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}
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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#endif
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#if UART_2_EN
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void UART_2_ISR(void)
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{
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if (UART_2_DEV->US_CSR & US_CSR_RXRDY) {
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char data = (char)UART_2_DEV->US_RHR;
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uart_config[UART_2].rx_cb(uart_config[UART_2].arg, data);
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}
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if ((UART_2_DEV->US_CSR & US_CSR_TXRDY) && (UART_2_DEV->US_IMR & US_IMR_TXRDY)) {
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if (uart_config[UART_2].tx_cb(uart_config[UART_2].arg) == 0) {
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UART_2_DEV->US_IDR = US_IDR_TXRDY;
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}
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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#endif
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#if UART_3_EN
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void UART_3_ISR(void)
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{
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if (UART_3_DEV->US_CSR & US_CSR_RXRDY) {
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char data = (char)UART_3_DEV->US_RHR;
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uart_config[UART_3].rx_cb(uart_config[UART_3].arg, data);
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}
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if ((UART_3_DEV->US_CSR & US_CSR_TXRDY) && (UART_3_DEV->US_IMR & US_IMR_TXRDY)) {
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if (uart_config[UART_3].tx_cb(uart_config[UART_3].arg) == 0) {
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UART_3_DEV->US_IDR = US_IDR_TXRDY;
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}
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}
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if (sched_context_switch_request) {
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thread_yield();
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}
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}
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#endif
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#endif /* UART_NUMOF */
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