mirror of
https://github.com/RIOT-OS/RIOT.git
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100 lines
2.6 KiB
Diff
100 lines
2.6 KiB
Diff
*** stock_iot-lab_M3/openwsn/rcc.c Thu Apr 24 11:19:40 2014
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--- riot-openwsn-wip/openwsn/rcc.c Thu Apr 24 16:55:54 2014
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***************
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*** 0 ****
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--- 1,94 ----
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+ /**
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+ \brief openmoteSTM32 definition of the RCC.
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+
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+ \author Chang Tengfei <tengfei.chang@gmail.com>, July 2012.
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+ */
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+ #include "stm32f10x_lib.h"
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+ //=========================== defines =========================================
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+
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+ //=========================== variables =======================================
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+
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+ //=========================== prototypes ======================================
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+
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+ //=========================== public ==========================================
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+
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+ void RCC_Configuration(void)
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+ {
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+ ErrorStatus HSEStartUpStatus;
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+
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+ /* RCC system reset(for debug purpose) */
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+ RCC_DeInit();
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+
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+ /* Enable HSE */
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+ RCC_HSEConfig(RCC_HSE_ON);
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+
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+ /* Wait till HSE is ready */
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+ HSEStartUpStatus = RCC_WaitForHSEStartUp();
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+
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+ if(HSEStartUpStatus == SUCCESS)
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+ {
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+ /* Enable Prefetch Buffer */
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+ FLASH_PrefetchBufferCmd(FLASH_PrefetchBuffer_Enable);
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+
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+ /* Flash 2 wait state */
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+ FLASH_SetLatency(FLASH_Latency_2);
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+
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+ /* HCLK = SYSCLK */
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+ RCC_HCLKConfig(RCC_SYSCLK_Div1);
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+
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+ /* PCLK2 = HCLK */
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+ RCC_PCLK2Config(RCC_HCLK_Div1);
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+
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+ /* PCLK1 = HCLK/2 */
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+ RCC_PCLK1Config(RCC_HCLK_Div2);
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+
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+ /* PLLCLK = 16MHz / 2 * 9 = 72 MHz */
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+ RCC_PLLConfig(RCC_PLLSource_HSE_Div2, RCC_PLLMul_9);
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+
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+ /* Enable PLL */
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+ RCC_PLLCmd(ENABLE);
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+
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+ /* Wait till PLL is ready */
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+ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
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+ {
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+ }
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+
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+ /* Select PLL as system clock source */
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+ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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+
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+ /* Wait till PLL is used as system clock source */
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+ while(RCC_GetSYSCLKSource() != 0x08)
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+ {
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+ }
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+ }
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+
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+ //enable AFIO
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+ RCC_APB2PeriphClockCmd(RCC_APB2Periph_AFIO, ENABLE);
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+ }
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+
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+ //when wakeup by alarm, configure rcc
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+ void RCC_Wakeup(void)
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+ {
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+ ErrorStatus HSEStartUpStatus;
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+
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+ //enable HSE
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+ RCC_HSEConfig(RCC_HSE_ON);
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+ //Wait till HSE is ready
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+ HSEStartUpStatus = RCC_WaitForHSEStartUp();
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+ if(HSEStartUpStatus == SUCCESS)
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+ {
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+ //enable PLL
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+ RCC_PLLCmd(ENABLE);
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+ //Wait till PLL is ready
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+ while(RCC_GetFlagStatus(RCC_FLAG_PLLRDY) == RESET)
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+ {}
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+
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+ // Select PLL as system clock source
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+ RCC_SYSCLKConfig(RCC_SYSCLKSource_PLLCLK);
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+
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+ //Wait till PLL is used as system clock source
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+ while(RCC_GetSYSCLKSource() != 0x08)
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+ {}
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+ }
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+ }
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+
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