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https://github.com/RIOT-OS/RIOT.git
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d9863c6b3c
This adds the board specification of the Adafruit Metro M4 Express [1]. The significance of this board is that it is compatible with both classical SPI Arduino Shields using the ISP header for SPI (such as `shield_w5100`) and more recent shields using D11/D12/D13 as SPI (such as `shield_llcc68`). [1]: https://learn.adafruit.com/adafruit-metro-m4-express-featuring-atsamd51/overview
269 lines
7.4 KiB
C
269 lines
7.4 KiB
C
/*
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* Copyright (C) 2024 ML!PA Consulting GmbH
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*
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* This file is subject to the terms and conditions of the GNU Lesser
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* General Public License v2.1. See the file LICENSE in the top level
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* directory for more details.
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*/
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/**
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* @ingroup boards_adafruit-metro-m4-express
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* @{
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*
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* @file
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* @brief Configuration of CPU peripherals for the Adafruit Metro M4 Express
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*
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* @author Marian Buschsieweke <marian.buschsieweke@posteo.net>
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*/
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#ifndef PERIPH_CONF_H
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#define PERIPH_CONF_H
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#include "periph_cpu.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @name Core clock frequency
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* @{
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*/
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#ifndef CLOCK_CORECLOCK
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#define CLOCK_CORECLOCK MHZ(120)
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#endif
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/** @} */
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/**
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* @name 32kHz Oscillator configuration
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* @{
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*/
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#define EXTERNAL_OSC32_SOURCE 1
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#define INTERNAL_OSC32_SOURCE 0
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#define ULTRA_LOW_POWER_INTERNAL_OSC_SOURCE 0
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/** @} */
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/**
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* @brief Enable the internal DC/DC converter
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* The board is equipped with L_EXT (L1) of 10uH at VSW pin.
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*/
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#define USE_VREG_BUCK (1)
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/**
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* @name ADC Configuration
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* @{
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*/
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#define ADC_GCLK_SRC SAM0_GCLK_PERIPH /**< clock used for ADC */
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#define ADC_PRESCALER ADC_CTRLA_PRESCALER_DIV8
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#define ADC_NEG_INPUT ADC_INPUTCTRL_MUXNEG(0x18u)
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#define ADC_REF_DEFAULT ADC_REFCTRL_REFSEL_INTVCC1
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static const adc_conf_chan_t adc_channels[] = {
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/* port, pin, muxpos, dev */
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{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA02, .dev = ADC0 }, /* A0 */
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{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA05, .dev = ADC0 }, /* A1 */
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{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA06, .dev = ADC0 }, /* A2 */
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{ .inputctrl = ADC0_INPUTCTRL_MUXPOS_PA04, .dev = ADC0 }, /* A3 */
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{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB08, .dev = ADC1 }, /* A4 */
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{ .inputctrl = ADC1_INPUTCTRL_MUXPOS_PB09, .dev = ADC1 }, /* A5 */
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};
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#define ADC_NUMOF ARRAY_SIZE(adc_channels)
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/** @} */
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/**
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* @name DAC configuration
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* @{
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*/
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/* Must not exceed 12 MHz */
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#define DAC_CLOCK SAM0_GCLK_TIMER
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/* Use external reference voltage on PA03 */
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/* (A solder jumper connects PA03 to 3V3 on the
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* back of the board. We assume the jumper has
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* not been cut.) */
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#define DAC_VREF DAC_CTRLB_REFSEL_VREFPU
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/** @} */
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/**
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* @name I2C configuration
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* @{
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*/
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static const i2c_conf_t i2c_config[] = {
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{
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.dev = &(SERCOM5->I2CM),
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.speed = I2C_SPEED_NORMAL,
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.scl_pin = GPIO_PIN(PB, 3), /* D: SERCOM5.1 */
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.sda_pin = GPIO_PIN(PB, 2), /* D: SERCOM5.0 */
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.mux = GPIO_MUX_D,
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.gclk_src = SAM0_GCLK_PERIPH,
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.flags = I2C_FLAG_NONE
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},
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};
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#define I2C_NUMOF ARRAY_SIZE(i2c_config)
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/** @} */
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/**
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* @name RTT configuration
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* @{
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*/
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#ifndef RTT_FREQUENCY
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#define RTT_FREQUENCY (32768U)
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#endif
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/** @} */
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/**
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* @name Timer peripheral configuration
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* @{
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*/
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static const tc32_conf_t timer_config[] = {
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{ /* Timer 0 - System Clock */
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.dev = TC0,
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.irq = TC0_IRQn,
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.mclk = &MCLK->APBAMASK.reg,
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.mclk_mask = MCLK_APBAMASK_TC0 | MCLK_APBAMASK_TC1,
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.gclk_id = TC0_GCLK_ID,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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},
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{ /* Timer 1 */
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.dev = TC2,
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.irq = TC2_IRQn,
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.mclk = &MCLK->APBBMASK.reg,
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.mclk_mask = MCLK_APBBMASK_TC2 | MCLK_APBBMASK_TC3,
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.gclk_id = TC2_GCLK_ID,
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.gclk_src = SAM0_GCLK_TIMER,
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.flags = TC_CTRLA_MODE_COUNT32,
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}
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};
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/* Timer 0 configuration */
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#define TIMER_0_CHANNELS 2
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#define TIMER_0_ISR isr_tc0
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/* Timer 1 configuration */
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#define TIMER_1_CHANNELS 2
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#define TIMER_1_ISR isr_tc2
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#define TIMER_NUMOF ARRAY_SIZE(timer_config)
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/** @} */
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/**
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* @name SPI configuration
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* @{
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*/
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static const spi_conf_t spi_config[] = {
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{ /* SPI on ISP */
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.dev = &(SERCOM2->SPI),
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.miso_pin = GPIO_PIN(PA, 14), /* C: SERCOM2.2, D: SERCOM4.2 */
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.mosi_pin = GPIO_PIN(PA, 12), /* C: SERCOM2.0, D: SERCOM4.1 */
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.clk_pin = GPIO_PIN(PA, 13), /* C: SERCOM2.1, D: SERCOM4.0 */
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.miso_mux = GPIO_MUX_C,
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.mosi_mux = GPIO_MUX_C,
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.clk_mux = GPIO_MUX_C,
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.miso_pad = SPI_PAD_MISO_2,
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.mosi_pad = SPI_PAD_MOSI_0_SCK_1,
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.gclk_src = SAM0_GCLK_PERIPH,
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#if MODULE_PERIPH_DMA
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.tx_trigger = SERCOM2_DMAC_ID_TX,
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.rx_trigger = SERCOM2_DMAC_ID_RX,
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#endif
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},
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#if !MODULE_PERIPH_UART
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{ /* D11=MOSI, D12=MISO, D13=SCK */
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.dev = &(SERCOM3->SPI),
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.miso_pin = GPIO_PIN(PA, 17), /* C: SERCOM1.1, D: SERCOM3.0 */
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.mosi_pin = GPIO_PIN(PA, 19), /* C: SERCOM1.3, D: SERCOM3.3 */
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.clk_pin = GPIO_PIN(PA, 16), /* C: SERCOM1.0, D: SERCOM3.1 */
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.miso_mux = GPIO_MUX_D,
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.mosi_mux = GPIO_MUX_D,
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.clk_mux = GPIO_MUX_D,
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.miso_pad = SPI_PAD_MISO_0,
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.mosi_pad = SPI_PAD_MOSI_3_SCK_1,
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.gclk_src = SAM0_GCLK_PERIPH,
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# if MODULE_PERIPH_DMA
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.tx_trigger = SERCOM3_DMAC_ID_TX,
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.rx_trigger = SERCOM3_DMAC_ID_RX,
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# endif
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},
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#endif
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#if MODULE_PERIPH_SPI_ON_QSPI
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{ /* QSPI in SPI mode */
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.dev = QSPI,
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.miso_pin = SAM0_QSPI_PIN_DATA_1,
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.mosi_pin = SAM0_QSPI_PIN_DATA_0,
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.clk_pin = SAM0_QSPI_PIN_CLK,
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.miso_mux = SAM0_QSPI_MUX,
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.mosi_mux = SAM0_QSPI_MUX,
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.clk_mux = SAM0_QSPI_MUX,
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.miso_pad = SPI_PAD_MISO_0, /* unused */
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.mosi_pad = SPI_PAD_MOSI_0_SCK_1, /* unused */
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.gclk_src = SAM0_GCLK_MAIN, /* unused */
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# if MODULE_PERIPH_DMA
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.tx_trigger = QSPI_DMAC_ID_TX,
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.rx_trigger = QSPI_DMAC_ID_RX,
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# endif
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},
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#endif
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};
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#define SPI_NUMOF ARRAY_SIZE(spi_config)
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/** @} */
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/**
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* @name USB peripheral configuration
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* @{
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*/
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static const sam0_common_usb_config_t sam_usbdev_config[] = {
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{
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.dm = GPIO_PIN(PA, 24),
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.dp = GPIO_PIN(PA, 25),
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.d_mux = GPIO_MUX_H,
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.device = &USB->DEVICE,
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.gclk_src = SAM0_GCLK_PERIPH,
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}
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};
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/** @} */
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/**
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* @name UART configuration
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* @{
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*/
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static const uart_conf_t uart_config[] = {
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/* The UART pins can be routed to SERCOM3 (used by SPI) or
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* SERCOM5 (used by I2C). The pad configuration for SERCOM5
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* is impossible, as TXD cannot be routed to pad 1.
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* Hence, we let periph_spi and periph_uart conflict in
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* Makefile.features.
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*/
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/* D0 = RXD, D1 = TXD */
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{
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.dev = &SERCOM3->USART,
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.rx_pin = GPIO_PIN(PA, 23), /* C: SERCOM3.1, D: SERCOM5.0 */
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.tx_pin = GPIO_PIN(PA, 22), /* C: SERCOM3.0, D: SERCOM5.1 */
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#ifdef MODULE_PERIPH_UART_HW_FC
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.rts_pin = GPIO_UNDEF,
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.cts_pin = GPIO_UNDEF,
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#endif
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.mux = GPIO_MUX_C,
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.rx_pad = UART_PAD_RX_1,
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.tx_pad = UART_PAD_TX_0,
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.flags = UART_FLAG_NONE,
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.gclk_src = SAM0_GCLK_PERIPH,
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},
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};
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/* interrupt function name mapping */
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#define UART_0_ISR isr_sercom3_2
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#define UART_0_ISR_TX isr_sercom3_0
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#define UART_NUMOF ARRAY_SIZE(uart_config)
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/** @} */
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#ifdef __cplusplus
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}
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#endif
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#endif /* PERIPH_CONF_H */
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/** @} */
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