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94 lines
2.1 KiB
C
94 lines
2.1 KiB
C
/*
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* Copyright (C) 2015 Rakendra Thapa <rakendrathapa@gmail.com
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*
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* This file is subject to the terms and conditions of the GNU Lesser General
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* Public License v2.1. See the file LICENSE in the top level directory for more
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* details.
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*/
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/**
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* @defgroup cpu_lm4f120
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* @ingroup cpu
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* @brief CPU specific implementations for the Stellaris Launchpad LM4F120 board
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* @{
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*
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* @file
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* @brief CPU specific hwtimer configuration options
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*12
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* @author Rakendra Thapa <rakendrathapa@gmail.com>
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*/
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#ifndef __CPU_CONF_H
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#define __CPU_CONF_H
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#include "hw_ints.h"
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#include "hw_memmap.h"
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#include "hw_nvic.h"
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#include "hw_sysctl.h"
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#include "hw_types.h"
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#include "lm4f120h5qr.h"
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#include "cortex-m4-def.h"
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#include "stellaris_periph/cpu.h"
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#include "stellaris_periph/debug.h"
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#include "stellaris_periph/interrupt.h"
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#include "stellaris_periph/sysctl.h"
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#include "stellaris_periph/adc.h"
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#include "stellaris_periph/gpio.h"
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#include "stellaris_periph/timer.h"
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#include "stellaris_periph/pin_map.h"
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#include "stellaris_periph/uart.h"
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#include "stellaris_periph/fpu.h"
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#include "stellaris_periph/rom.h"
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#include "hwtimer_cpu.h"
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#include "periph/uart.h"
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#include "stdio.h"
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#include "stdlib.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief ARM Cortex-M specific CPU configuration
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* @{
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*/
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#define CPU_DEFAULT_IRQ_PRIO (1U)
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#define CPU_IRQ_NUMOF (48U)
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#define CPU_FLASH_BASE FLASH_BASE
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/** @} */
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/**
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* @brief Length for reading CPU_ID
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*/
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#define CPUID_ID_LEN (12)
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#define CPUID_ADDR NVIC_CPUID
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/**
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* @name CC110X buffer size definitions for the stm32f4
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* @{
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*/
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#ifdef MODULE_CC110X
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#define TRANSCEIVER_BUFFER_SIZE (10)
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#define RX_BUF_SIZE (10)
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#endif
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/**
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* @name Define the nominal CPU core clock in this board
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*/
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#define F_CPU 1000000
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#define CLK80 1
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#define CLK50 2
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#define CLK40 3
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#define CLK16 4
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#define CLK1 5
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extern void setup_fpu(void);
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extern void cpu_clock_init(int);
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#ifdef __cplusplus
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}
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#endif
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#endif /* __CPU_CONF_H */
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